Lines Matching +full:0 +full:x3ffc
25 si5332_0: si5332-0 { /* u17 */
27 #clock-cells = <0>;
33 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
57 #clock-cells = <0>;
64 #size-cells = <0>;
66 pinctrl-0 = <&pinctrl_i2c1_default>;
71 /* u14 - 0x40 - ina260 */
72 /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
86 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
87 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
88 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
89 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
90 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
91 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
92 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
93 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
101 phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
113 pinctrl-0 = <&pinctrl_usb0_default>;
115 phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
129 pinctrl-0 = <&pinctrl_sdhci1_default>;
145 pinctrl-0 = <&pinctrl_gem3_default>;
152 #size-cells = <0>;
325 pinctrl-0 = <&pinctrl_uart1_default>;