dts/toshiba/tmpv7708.dtsi

14 /memreserve/ 0x81000000 0x00300000;	/* cpu-release-addr */
23 		#size-cells = <0>;
57 		cpu0: cpu@0 {
61 			cpu-release-addr = <0x0 0x81100000>;
62 			reg = <0x00>;
69 			cpu-release-addr = <0x0 0x81100000>;
70 			reg = <0x01>;
77 			cpu-release-addr = <0x0 0x81100000>;
78 			reg = <0x02>;
85 			cpu-release-addr = <0x0 0x81100000>;
86 			reg = <0x03>;
93 			cpu-release-addr = <0x0 0x81100000>;
94 			reg = <0x100>;
101 			cpu-release-addr = <0x0 0x81100000>;
102 			reg = <0x101>;
109 			cpu-release-addr = <0x0 0x81100000>;
110 			reg = <0x102>;
117 			cpu-release-addr = <0x0 0x81100000>;
118 			reg = <0x103>;
134 		#clock-cells = <0>;
142 		#clock-cells = <0>;
157 			reg = <0 0x24001000 0 0x1000>,
158 			      <0 0x24002000 0 0x2000>,
159 			      <0 0x24004000 0 0x2000>,
160 			      <0 0x24006000 0 0x2000>;
165 			reg = <0 0x24190000 0 0x10000>;
170 			reg = <0 0x28020000 0 0x1000>;
171 			#gpio-cells = <0x2>;
172 			gpio-ranges = <&pmux 0 0 32>;
181 			reg = <0 0x24220000 0 0x820>;
188 			reg = <0 0x24200000 0 0x2140>;
195 			reg = <0 0x28200000 0 0x1000>;
198 			pinctrl-0 = <&uart0_pins>;
206 			reg = <0 0x28201000 0 0x1000>;
209 			pinctrl-0 = <&uart1_pins>;
217 			reg = <0 0x28202000 0 0x1000>;
220 			pinctrl-0 = <&uart2_pins>;
228 			reg = <0 0x28203000 0 0x1000>;
231 			pinctrl-0 = <&uart3_pins>;
239 			reg = <0 0x28030000 0 0x1000>;
242 			pinctrl-0 = <&i2c0_pins>;
245 			#size-cells = <0>;
252 			reg = <0 0x28031000 0 0x1000>;
255 			pinctrl-0 = <&i2c1_pins>;
258 			#size-cells = <0>;
265 			reg = <0 0x28032000 0 0x1000>;
268 			pinctrl-0 = <&i2c2_pins>;
271 			#size-cells = <0>;
278 			reg = <0 0x28033000 0 0x1000>;
281 			pinctrl-0 = <&i2c3_pins>;
284 			#size-cells = <0>;
291 			reg = <0 0x28034000 0 0x1000>;
294 			pinctrl-0 = <&i2c4_pins>;
297 			#size-cells = <0>;
304 			reg = <0 0x28035000 0 0x1000>;
307 			pinctrl-0 = <&i2c5_pins>;
310 			#size-cells = <0>;
317 			reg = <0 0x28036000 0 0x1000>;
320 			pinctrl-0 = <&i2c6_pins>;
323 			#size-cells = <0>;
330 			reg = <0 0x28037000 0 0x1000>;
333 			pinctrl-0 = <&i2c7_pins>;
336 			#size-cells = <0>;
343 			reg = <0 0x28038000 0 0x1000>;
346 			pinctrl-0 = <&i2c8_pins>;
349 			#size-cells = <0>;
356 			reg = <0 0x28140000 0 0x1000>;
359 			pinctrl-0 = <&spi0_pins>;
362 			#size-cells = <0>;
370 			reg = <0 0x28141000 0 0x1000>;
373 			pinctrl-0 = <&spi1_pins>;
376 			#size-cells = <0>;
384 			reg = <0 0x28142000 0 0x1000>;
387 			pinctrl-0 = <&spi2_pins>;
390 			#size-cells = <0>;
398 			reg = <0 0x28143000 0 0x1000>;
401 			pinctrl-0 = <&spi3_pins>;
404 			#size-cells = <0>;
412 			reg = <0 0x28144000 0 0x1000>;
415 			pinctrl-0 = <&spi4_pins>;
418 			#size-cells = <0>;
426 			reg = <0 0x28145000 0 0x1000>;
429 			pinctrl-0 = <&spi5_pins>;
432 			#size-cells = <0>;
440 			reg = <0 0x28146000 0 0x1000>;
443 			pinctrl-0 = <&spi6_pins>;
446 			#size-cells = <0>;
454 			reg = <0 0x28000000 0 0x10000>;
467 			reg = <0 0x28330000 0 0x1000>;
474 			reg = <0 0x241c0000 0 0x1000>;
476 			pinctrl-0 = <&pwm_mux>;
483 			reg = <0x0 0x28400000 0x0 0x00400000>,
484 			      <0x0 0x70000000 0x0 0x10000000>,
485 			      <0x0 0x28050000 0x0 0x00010000>,
486 			      <0x0 0x24200000 0x0 0x00002000>,
487 			      <0x0 0x24162000 0x0 0x00001000>;
490 			bus-range = <0x00 0xff>;
497 			ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000
498 				  0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
502 			interrupt-map-mask = <0 0 0 7>;
504 				<0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
505 				 0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
506 				 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
507 				 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;