Lines Matching +full:am654 +full:- +full:r5f
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
31 #address-cells = <2>;
32 #size-cells = <2>;
34 #interrupt-cells = <3>;
35 interrupt-controller;
45 gic_its: msi-controller@1820000 {
46 compatible = "arm,gic-v3-its";
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
49 msi-controller;
50 #msi-cells = <1>;
54 main_gpio_intr: interrupt-controller@a00000 {
55 compatible = "ti,sci-intr";
57 ti,intr-trigger-type = <1>;
58 interrupt-controller;
59 interrupt-parent = <&gic500>;
60 #interrupt-cells = <1>;
62 ti,sci-dev-id = <10>;
63 ti,interrupt-ranges = <8 392 56>;
67 compatible = "pinctrl-single";
70 #pinctrl-cells = <1>;
71 pinctrl-single,register-width = <32>;
72 pinctrl-single,function-mask = <0xffffffff>;
77 compatible = "pinctrl-single";
79 #pinctrl-cells = <1>;
80 pinctrl-single,register-width = <32>;
81 pinctrl-single,function-mask = <0x00000007>;
86 compatible = "pinctrl-single";
88 #pinctrl-cells = <1>;
89 pinctrl-single,register-width = <32>;
90 pinctrl-single,function-mask = <0x0000001f>;
94 compatible = "ti,j721e-sa2ul";
96 power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;
97 #address-cells = <2>;
98 #size-cells = <2>;
103 dma-names = "tx", "rx1", "rx2";
106 compatible = "inside-secure,safexcel-eip76";
113 compatible = "ti,am654-timer";
117 clock-names = "fck";
118 assigned-clocks = <&k3_clks 97 2>;
119 assigned-clock-parents = <&k3_clks 97 3>;
120 power-domains = <&k3_pds 97 TI_SCI_PD_EXCLUSIVE>;
121 ti,timer-pwm;
125 compatible = "ti,am654-timer";
129 clock-names = "fck";
130 assigned-clocks = <&k3_clks 98 2>;
131 assigned-clock-parents = <&k3_clks 98 3>;
132 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
133 ti,timer-pwm;
137 compatible = "ti,am654-timer";
141 clock-names = "fck";
142 assigned-clocks = <&k3_clks 99 2>;
143 assigned-clock-parents = <&k3_clks 99 3>;
144 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
145 ti,timer-pwm;
149 compatible = "ti,am654-timer";
153 clock-names = "fck";
154 assigned-clocks = <&k3_clks 100 2>;
155 assigned-clock-parents = <&k3_clks 100 3>;
156 power-domains = <&k3_pds 100 TI_SCI_PD_EXCLUSIVE>;
157 ti,timer-pwm;
161 compatible = "ti,am654-timer";
165 clock-names = "fck";
166 assigned-clocks = <&k3_clks 101 2>;
167 assigned-clock-parents = <&k3_clks 101 3>;
168 power-domains = <&k3_pds 101 TI_SCI_PD_EXCLUSIVE>;
169 ti,timer-pwm;
173 compatible = "ti,am654-timer";
177 clock-names = "fck";
178 assigned-clocks = <&k3_clks 102 2>;
179 assigned-clock-parents = <&k3_clks 102 3>;
180 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
181 ti,timer-pwm;
185 compatible = "ti,am654-timer";
189 clock-names = "fck";
190 assigned-clocks = <&k3_clks 103 2>;
191 assigned-clock-parents = <&k3_clks 103 3>;
192 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
193 ti,timer-pwm;
197 compatible = "ti,am654-timer";
201 clock-names = "fck";
202 assigned-clocks = <&k3_clks 104 2>;
203 assigned-clock-parents = <&k3_clks 104 3>;
204 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
205 ti,timer-pwm;
209 compatible = "ti,am654-timer";
213 clock-names = "fck";
214 assigned-clocks = <&k3_clks 105 2>;
215 assigned-clock-parents = <&k3_clks 105 3>;
216 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
217 ti,timer-pwm;
221 compatible = "ti,am654-timer";
225 clock-names = "fck";
226 assigned-clocks = <&k3_clks 106 2>;
227 assigned-clock-parents = <&k3_clks 106 3>;
228 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
229 ti,timer-pwm;
233 compatible = "ti,am654-timer";
237 clock-names = "fck";
238 assigned-clocks = <&k3_clks 107 2>;
239 assigned-clock-parents = <&k3_clks 107 3>;
240 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
241 ti,timer-pwm;
245 compatible = "ti,am654-timer";
249 clock-names = "fck";
250 assigned-clocks = <&k3_clks 108 2>;
251 assigned-clock-parents = <&k3_clks 108 3>;
252 power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
253 ti,timer-pwm;
257 compatible = "ti,am654-timer";
261 clock-names = "fck";
262 assigned-clocks = <&k3_clks 109 2>;
263 assigned-clock-parents = <&k3_clks 109 3>;
264 power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
265 ti,timer-pwm;
269 compatible = "ti,am654-timer";
273 clock-names = "fck";
274 assigned-clocks = <&k3_clks 110 2>;
275 assigned-clock-parents = <&k3_clks 110 3>;
276 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
277 ti,timer-pwm;
281 compatible = "ti,am654-timer";
285 clock-names = "fck";
286 assigned-clocks = <&k3_clks 111 2>;
287 assigned-clock-parents = <&k3_clks 111 3>;
288 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
289 ti,timer-pwm;
293 compatible = "ti,am654-timer";
297 clock-names = "fck";
298 assigned-clocks = <&k3_clks 112 2>;
299 assigned-clock-parents = <&k3_clks 112 3>;
300 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
301 ti,timer-pwm;
305 compatible = "ti,am654-timer";
309 clock-names = "fck";
310 assigned-clocks = <&k3_clks 113 2>;
311 assigned-clock-parents = <&k3_clks 113 3>;
312 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
313 ti,timer-pwm;
317 compatible = "ti,am654-timer";
321 clock-names = "fck";
322 assigned-clocks = <&k3_clks 114 2>;
323 assigned-clock-parents = <&k3_clks 114 3>;
324 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
325 ti,timer-pwm;
329 compatible = "ti,am654-timer";
333 clock-names = "fck";
334 assigned-clocks = <&k3_clks 115 2>;
335 assigned-clock-parents = <&k3_clks 115 3>;
336 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
337 ti,timer-pwm;
341 compatible = "ti,am654-timer";
345 clock-names = "fck";
346 assigned-clocks = <&k3_clks 116 2>;
347 assigned-clock-parents = <&k3_clks 116 3>;
348 power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
349 ti,timer-pwm;
353 compatible = "ti,j721e-uart", "ti,am654-uart";
356 current-speed = <115200>;
358 clock-names = "fclk";
359 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
364 compatible = "ti,j721e-uart", "ti,am654-uart";
367 current-speed = <115200>;
369 clock-names = "fclk";
370 power-domains = <&k3_pds 388 TI_SCI_PD_EXCLUSIVE>;
375 compatible = "ti,j721e-uart", "ti,am654-uart";
378 current-speed = <115200>;
380 clock-names = "fclk";
381 power-domains = <&k3_pds 389 TI_SCI_PD_EXCLUSIVE>;
386 compatible = "ti,j721e-uart", "ti,am654-uart";
389 current-speed = <115200>;
391 clock-names = "fclk";
392 power-domains = <&k3_pds 390 TI_SCI_PD_EXCLUSIVE>;
397 compatible = "ti,j721e-uart", "ti,am654-uart";
400 current-speed = <115200>;
402 clock-names = "fclk";
403 power-domains = <&k3_pds 391 TI_SCI_PD_EXCLUSIVE>;
408 compatible = "ti,j721e-uart", "ti,am654-uart";
411 current-speed = <115200>;
413 clock-names = "fclk";
414 power-domains = <&k3_pds 392 TI_SCI_PD_EXCLUSIVE>;
419 compatible = "ti,j721e-uart", "ti,am654-uart";
422 current-speed = <115200>;
424 clock-names = "fclk";
425 power-domains = <&k3_pds 393 TI_SCI_PD_EXCLUSIVE>;
430 compatible = "ti,j721e-uart", "ti,am654-uart";
433 current-speed = <115200>;
435 clock-names = "fclk";
436 power-domains = <&k3_pds 394 TI_SCI_PD_EXCLUSIVE>;
441 compatible = "ti,j721e-uart", "ti,am654-uart";
444 current-speed = <115200>;
446 clock-names = "fclk";
447 power-domains = <&k3_pds 395 TI_SCI_PD_EXCLUSIVE>;
452 compatible = "ti,j721e-uart", "ti,am654-uart";
455 current-speed = <115200>;
457 clock-names = "fclk";
458 power-domains = <&k3_pds 396 TI_SCI_PD_EXCLUSIVE>;
463 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
465 gpio-controller;
466 #gpio-cells = <2>;
467 interrupt-parent = <&main_gpio_intr>;
469 interrupt-controller;
470 #interrupt-cells = <2>;
472 ti,davinci-gpio-unbanked = <0>;
473 power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>;
475 clock-names = "gpio";
480 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
482 gpio-controller;
483 #gpio-cells = <2>;
484 interrupt-parent = <&main_gpio_intr>;
486 interrupt-controller;
487 #interrupt-cells = <2>;
489 ti,davinci-gpio-unbanked = <0>;
490 power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>;
492 clock-names = "gpio";
497 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
499 gpio-controller;
500 #gpio-cells = <2>;
501 interrupt-parent = <&main_gpio_intr>;
503 interrupt-controller;
504 #interrupt-cells = <2>;
506 ti,davinci-gpio-unbanked = <0>;
507 power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>;
509 clock-names = "gpio";
514 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
516 gpio-controller;
517 #gpio-cells = <2>;
518 interrupt-parent = <&main_gpio_intr>;
520 interrupt-controller;
521 #interrupt-cells = <2>;
523 ti,davinci-gpio-unbanked = <0>;
524 power-domains = <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
526 clock-names = "gpio";
531 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
534 #address-cells = <1>;
535 #size-cells = <0>;
537 clock-names = "fck";
538 power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
543 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
546 #address-cells = <1>;
547 #size-cells = <0>;
549 clock-names = "fck";
550 power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
555 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
558 #address-cells = <1>;
559 #size-cells = <0>;
561 clock-names = "fck";
562 power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
567 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
570 #address-cells = <1>;
571 #size-cells = <0>;
573 clock-names = "fck";
574 power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
579 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
582 #address-cells = <1>;
583 #size-cells = <0>;
585 clock-names = "fck";
586 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
591 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
594 #address-cells = <1>;
595 #size-cells = <0>;
597 clock-names = "fck";
598 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
603 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
606 #address-cells = <1>;
607 #size-cells = <0>;
609 clock-names = "fck";
610 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
615 compatible = "ti,j721e-sdhci-8bit";
619 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
621 clock-names = "clk_ahb", "clk_xin";
622 assigned-clocks = <&k3_clks 140 2>;
623 assigned-clock-parents = <&k3_clks 140 3>;
624 bus-width = <8>;
625 ti,otap-del-sel-legacy = <0x0>;
626 ti,otap-del-sel-mmc-hs = <0x0>;
627 ti,otap-del-sel-ddr52 = <0x6>;
628 ti,otap-del-sel-hs200 = <0x8>;
629 ti,otap-del-sel-hs400 = <0x5>;
630 ti,itap-del-sel-legacy = <0x10>;
631 ti,itap-del-sel-mmc-hs = <0xa>;
632 ti,strobe-sel = <0x77>;
633 ti,clkbuf-sel = <0x7>;
634 ti,trm-icp = <0x8>;
635 mmc-ddr-1_8v;
636 mmc-hs200-1_8v;
637 mmc-hs400-1_8v;
638 dma-coherent;
643 compatible = "ti,j721e-sdhci-4bit";
647 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
649 clock-names = "clk_ahb", "clk_xin";
650 assigned-clocks = <&k3_clks 141 4>;
651 assigned-clock-parents = <&k3_clks 141 5>;
652 bus-width = <4>;
653 ti,otap-del-sel-legacy = <0x0>;
654 ti,otap-del-sel-sd-hs = <0x0>;
655 ti,otap-del-sel-sdr12 = <0xf>;
656 ti,otap-del-sel-sdr25 = <0xf>;
657 ti,otap-del-sel-sdr50 = <0xc>;
658 ti,otap-del-sel-sdr104 = <0x5>;
659 ti,otap-del-sel-ddr50 = <0xc>;
660 ti,itap-del-sel-legacy = <0x0>;
661 ti,itap-del-sel-sd-hs = <0x0>;
662 ti,itap-del-sel-sdr12 = <0x0>;
663 ti,itap-del-sel-sdr25 = <0x0>;
664 ti,clkbuf-sel = <0x7>;
665 ti,trm-icp = <0x8>;
666 dma-coherent;
667 sdhci-caps-mask = <0x00000003 0x00000000>;
668 no-1-8-v;
673 bootph-all;
674 compatible = "simple-bus";
675 #address-cells = <2>;
676 #size-cells = <2>;
678 ti,sci-dev-id = <280>;
679 dma-coherent;
680 dma-ranges;
682 main_navss_intr: interrupt-controller@310e0000 {
683 compatible = "ti,sci-intr";
685 ti,intr-trigger-type = <4>;
686 interrupt-controller;
687 interrupt-parent = <&gic500>;
688 #interrupt-cells = <1>;
690 ti,sci-dev-id = <283>;
691 ti,interrupt-ranges = <0 64 64>,
696 main_udmass_inta: msi-controller@33d00000 {
697 compatible = "ti,sci-inta";
699 interrupt-controller;
700 #interrupt-cells = <0>;
701 interrupt-parent = <&main_navss_intr>;
702 msi-controller;
704 ti,sci-dev-id = <321>;
705 ti,interrupt-ranges = <0 0 256>;
709 bootph-all;
710 compatible = "ti,am654-secure-proxy";
711 #mbox-cells = <1>;
712 reg-names = "target_data", "rt", "scfg";
716 interrupt-names = "rx_011";
721 compatible = "ti,am654-hwspinlock";
723 #hwlock-cells = <1>;
727 compatible = "ti,am654-mailbox";
729 #mbox-cells = <1>;
730 ti,mbox-num-users = <4>;
731 ti,mbox-num-fifos = <16>;
732 interrupt-parent = <&main_navss_intr>;
737 compatible = "ti,am654-mailbox";
739 #mbox-cells = <1>;
740 ti,mbox-num-users = <4>;
741 ti,mbox-num-fifos = <16>;
742 interrupt-parent = <&main_navss_intr>;
747 compatible = "ti,am654-mailbox";
749 #mbox-cells = <1>;
750 ti,mbox-num-users = <4>;
751 ti,mbox-num-fifos = <16>;
752 interrupt-parent = <&main_navss_intr>;
757 compatible = "ti,am654-mailbox";
759 #mbox-cells = <1>;
760 ti,mbox-num-users = <4>;
761 ti,mbox-num-fifos = <16>;
762 interrupt-parent = <&main_navss_intr>;
767 compatible = "ti,am654-mailbox";
769 #mbox-cells = <1>;
770 ti,mbox-num-users = <4>;
771 ti,mbox-num-fifos = <16>;
772 interrupt-parent = <&main_navss_intr>;
777 compatible = "ti,am654-mailbox";
779 #mbox-cells = <1>;
780 ti,mbox-num-users = <4>;
781 ti,mbox-num-fifos = <16>;
782 interrupt-parent = <&main_navss_intr>;
787 compatible = "ti,am654-mailbox";
789 #mbox-cells = <1>;
790 ti,mbox-num-users = <4>;
791 ti,mbox-num-fifos = <16>;
792 interrupt-parent = <&main_navss_intr>;
797 compatible = "ti,am654-mailbox";
799 #mbox-cells = <1>;
800 ti,mbox-num-users = <4>;
801 ti,mbox-num-fifos = <16>;
802 interrupt-parent = <&main_navss_intr>;
807 compatible = "ti,am654-mailbox";
809 #mbox-cells = <1>;
810 ti,mbox-num-users = <4>;
811 ti,mbox-num-fifos = <16>;
812 interrupt-parent = <&main_navss_intr>;
817 compatible = "ti,am654-mailbox";
819 #mbox-cells = <1>;
820 ti,mbox-num-users = <4>;
821 ti,mbox-num-fifos = <16>;
822 interrupt-parent = <&main_navss_intr>;
827 compatible = "ti,am654-mailbox";
829 #mbox-cells = <1>;
830 ti,mbox-num-users = <4>;
831 ti,mbox-num-fifos = <16>;
832 interrupt-parent = <&main_navss_intr>;
837 compatible = "ti,am654-mailbox";
839 #mbox-cells = <1>;
840 ti,mbox-num-users = <4>;
841 ti,mbox-num-fifos = <16>;
842 interrupt-parent = <&main_navss_intr>;
847 compatible = "ti,am654-mailbox";
849 #mbox-cells = <1>;
850 ti,mbox-num-users = <4>;
851 ti,mbox-num-fifos = <16>;
852 interrupt-parent = <&main_navss_intr>;
857 compatible = "ti,am654-mailbox";
859 #mbox-cells = <1>;
860 ti,mbox-num-users = <4>;
861 ti,mbox-num-fifos = <16>;
862 interrupt-parent = <&main_navss_intr>;
867 compatible = "ti,am654-mailbox";
869 #mbox-cells = <1>;
870 ti,mbox-num-users = <4>;
871 ti,mbox-num-fifos = <16>;
872 interrupt-parent = <&main_navss_intr>;
877 compatible = "ti,am654-mailbox";
879 #mbox-cells = <1>;
880 ti,mbox-num-users = <4>;
881 ti,mbox-num-fifos = <16>;
882 interrupt-parent = <&main_navss_intr>;
887 compatible = "ti,am654-mailbox";
889 #mbox-cells = <1>;
890 ti,mbox-num-users = <4>;
891 ti,mbox-num-fifos = <16>;
892 interrupt-parent = <&main_navss_intr>;
897 compatible = "ti,am654-mailbox";
899 #mbox-cells = <1>;
900 ti,mbox-num-users = <4>;
901 ti,mbox-num-fifos = <16>;
902 interrupt-parent = <&main_navss_intr>;
907 compatible = "ti,am654-mailbox";
909 #mbox-cells = <1>;
910 ti,mbox-num-users = <4>;
911 ti,mbox-num-fifos = <16>;
912 interrupt-parent = <&main_navss_intr>;
917 compatible = "ti,am654-mailbox";
919 #mbox-cells = <1>;
920 ti,mbox-num-users = <4>;
921 ti,mbox-num-fifos = <16>;
922 interrupt-parent = <&main_navss_intr>;
927 compatible = "ti,am654-mailbox";
929 #mbox-cells = <1>;
930 ti,mbox-num-users = <4>;
931 ti,mbox-num-fifos = <16>;
932 interrupt-parent = <&main_navss_intr>;
937 compatible = "ti,am654-mailbox";
939 #mbox-cells = <1>;
940 ti,mbox-num-users = <4>;
941 ti,mbox-num-fifos = <16>;
942 interrupt-parent = <&main_navss_intr>;
947 compatible = "ti,am654-mailbox";
949 #mbox-cells = <1>;
950 ti,mbox-num-users = <4>;
951 ti,mbox-num-fifos = <16>;
952 interrupt-parent = <&main_navss_intr>;
957 compatible = "ti,am654-mailbox";
959 #mbox-cells = <1>;
960 ti,mbox-num-users = <4>;
961 ti,mbox-num-fifos = <16>;
962 interrupt-parent = <&main_navss_intr>;
967 compatible = "ti,am654-navss-ringacc";
973 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
974 ti,num-rings = <1024>;
975 ti,sci-rm-range-gp-rings = <0x1>;
977 ti,sci-dev-id = <315>;
978 msi-parent = <&main_udmass_inta>;
981 main_udmap: dma-controller@31150000 {
982 compatible = "ti,j721e-navss-main-udmap";
986 reg-names = "gcfg", "rchanrt", "tchanrt";
987 msi-parent = <&main_udmass_inta>;
988 #dma-cells = <1>;
991 ti,sci-dev-id = <319>;
994 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
997 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
1000 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
1004 compatible = "ti,j721e-cpts";
1006 reg-names = "cpts";
1008 clock-names = "cpts";
1009 assigned-clocks = <&k3_clks 62 3>; /* CPTS_RFT_CLK */
1010 assigned-clock-parents = <&k3_clks 62 5>; /* MAIN_0_HSDIV6_CLK */
1011 interrupts-extended = <&main_navss_intr 391>;
1012 interrupt-names = "cpts";
1013 ti,cpts-periodic-outputs = <6>;
1014 ti,cpts-ext-ts-inputs = <8>;
1022 reg-names = "m_can", "message_ram";
1023 power-domains = <&k3_pds 245 TI_SCI_PD_EXCLUSIVE>;
1025 clock-names = "hclk", "cclk";
1028 interrupt-names = "int0", "int1";
1029 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1037 reg-names = "m_can", "message_ram";
1038 power-domains = <&k3_pds 246 TI_SCI_PD_EXCLUSIVE>;
1040 clock-names = "hclk", "cclk";
1043 interrupt-names = "int0", "int1";
1044 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1052 reg-names = "m_can", "message_ram";
1053 power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
1055 clock-names = "hclk", "cclk";
1058 interrupt-names = "int0", "int1";
1059 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1067 reg-names = "m_can", "message_ram";
1068 power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
1070 clock-names = "hclk", "cclk";
1073 interrupt-names = "int0", "int1";
1074 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1082 reg-names = "m_can", "message_ram";
1083 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
1085 clock-names = "hclk", "cclk";
1088 interrupt-names = "int0", "int1";
1089 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1097 reg-names = "m_can", "message_ram";
1098 power-domains = <&k3_pds 250 TI_SCI_PD_EXCLUSIVE>;
1100 clock-names = "hclk", "cclk";
1103 interrupt-names = "int0", "int1";
1104 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1112 reg-names = "m_can", "message_ram";
1113 power-domains = <&k3_pds 251 TI_SCI_PD_EXCLUSIVE>;
1115 clock-names = "hclk", "cclk";
1118 interrupt-names = "int0", "int1";
1119 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1127 reg-names = "m_can", "message_ram";
1128 power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
1130 clock-names = "hclk", "cclk";
1133 interrupt-names = "int0", "int1";
1134 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1142 reg-names = "m_can", "message_ram";
1143 power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;
1145 clock-names = "hclk", "cclk";
1148 interrupt-names = "int0", "int1";
1149 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1157 reg-names = "m_can", "message_ram";
1158 power-domains = <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>;
1160 clock-names = "hclk", "cclk";
1163 interrupt-names = "int0", "int1";
1164 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1172 reg-names = "m_can", "message_ram";
1173 power-domains = <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>;
1175 clock-names = "hclk", "cclk";
1178 interrupt-names = "int0", "int1";
1179 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1187 reg-names = "m_can", "message_ram";
1188 power-domains = <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>;
1190 clock-names = "hclk", "cclk";
1193 interrupt-names = "int0", "int1";
1194 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1202 reg-names = "m_can", "message_ram";
1203 power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>;
1205 clock-names = "hclk", "cclk";
1208 interrupt-names = "int0", "int1";
1209 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1217 reg-names = "m_can", "message_ram";
1218 power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
1220 clock-names = "hclk", "cclk";
1223 interrupt-names = "int0", "int1";
1224 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1232 reg-names = "m_can", "message_ram";
1233 power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
1235 clock-names = "hclk", "cclk";
1238 interrupt-names = "int0", "int1";
1239 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1247 reg-names = "m_can", "message_ram";
1248 power-domains = <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>;
1250 clock-names = "hclk", "cclk";
1253 interrupt-names = "int0", "int1";
1254 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1262 reg-names = "m_can", "message_ram";
1263 power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
1265 clock-names = "hclk", "cclk";
1268 interrupt-names = "int0", "int1";
1269 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1277 reg-names = "m_can", "message_ram";
1278 power-domains = <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>;
1280 clock-names = "hclk", "cclk";
1283 interrupt-names = "int0", "int1";
1284 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1289 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1294 power-domains = <&k3_pds 376 TI_SCI_PD_EXCLUSIVE>;
1300 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1303 #address-cells = <1>;
1304 #size-cells = <0>;
1305 power-domains = <&k3_pds 377 TI_SCI_PD_EXCLUSIVE>;
1311 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1314 #address-cells = <1>;
1315 #size-cells = <0>;
1316 power-domains = <&k3_pds 378 TI_SCI_PD_EXCLUSIVE>;
1322 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1325 #address-cells = <1>;
1326 #size-cells = <0>;
1327 power-domains = <&k3_pds 379 TI_SCI_PD_EXCLUSIVE>;
1333 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1336 #address-cells = <1>;
1337 #size-cells = <0>;
1338 power-domains = <&k3_pds 380 TI_SCI_PD_EXCLUSIVE>;
1344 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1347 #address-cells = <1>;
1348 #size-cells = <0>;
1349 power-domains = <&k3_pds 381 TI_SCI_PD_EXCLUSIVE>;
1355 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1358 #address-cells = <1>;
1359 #size-cells = <0>;
1360 power-domains = <&k3_pds 382 TI_SCI_PD_EXCLUSIVE>;
1366 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
1369 #address-cells = <1>;
1370 #size-cells = <0>;
1371 power-domains = <&k3_pds 383 TI_SCI_PD_EXCLUSIVE>;
1376 ufs_wrapper: ufs-wrapper@4e80000 {
1377 compatible = "ti,j721e-ufs";
1379 power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
1381 assigned-clocks = <&k3_clks 387 3>;
1382 assigned-clock-parents = <&k3_clks 387 6>;
1384 #address-cells = <2>;
1385 #size-cells = <2>;
1389 compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
1392 freq-table-hz = <250000000 250000000>, <19200000 19200000>,
1395 clock-names = "core_clk", "phy_clk", "ref_clk";
1396 dma-coherent;
1401 compatible = "ti,j721s2-r5fss";
1402 ti,cluster-mode = <1>;
1403 #address-cells = <1>;
1404 #size-cells = <1>;
1407 power-domains = <&k3_pds 336 TI_SCI_PD_EXCLUSIVE>;
1409 main_r5fss0_core0: r5f@5c00000 {
1410 compatible = "ti,j721s2-r5f";
1413 reg-names = "atcm", "btcm";
1415 ti,sci-dev-id = <339>;
1416 ti,sci-proc-ids = <0x06 0xff>;
1418 firmware-name = "j784s4-main-r5f0_0-fw";
1419 ti,atcm-enable = <1>;
1420 ti,btcm-enable = <1>;
1424 main_r5fss0_core1: r5f@5d00000 {
1425 compatible = "ti,j721s2-r5f";
1428 reg-names = "atcm", "btcm";
1430 ti,sci-dev-id = <340>;
1431 ti,sci-proc-ids = <0x07 0xff>;
1433 firmware-name = "j784s4-main-r5f0_1-fw";
1434 ti,atcm-enable = <1>;
1435 ti,btcm-enable = <1>;
1441 compatible = "ti,j721s2-r5fss";
1442 ti,cluster-mode = <1>;
1443 #address-cells = <1>;
1444 #size-cells = <1>;
1447 power-domains = <&k3_pds 337 TI_SCI_PD_EXCLUSIVE>;
1449 main_r5fss1_core0: r5f@5e00000 {
1450 compatible = "ti,j721s2-r5f";
1453 reg-names = "atcm", "btcm";
1455 ti,sci-dev-id = <341>;
1456 ti,sci-proc-ids = <0x08 0xff>;
1458 firmware-name = "j784s4-main-r5f1_0-fw";
1459 ti,atcm-enable = <1>;
1460 ti,btcm-enable = <1>;
1464 main_r5fss1_core1: r5f@5f00000 {
1465 compatible = "ti,j721s2-r5f";
1468 reg-names = "atcm", "btcm";
1470 ti,sci-dev-id = <342>;
1471 ti,sci-proc-ids = <0x09 0xff>;
1473 firmware-name = "j784s4-main-r5f1_1-fw";
1474 ti,atcm-enable = <1>;
1475 ti,btcm-enable = <1>;
1481 compatible = "ti,j721s2-r5fss";
1482 ti,cluster-mode = <1>;
1483 #address-cells = <1>;
1484 #size-cells = <1>;
1487 power-domains = <&k3_pds 338 TI_SCI_PD_EXCLUSIVE>;
1489 main_r5fss2_core0: r5f@5900000 {
1490 compatible = "ti,j721s2-r5f";
1493 reg-names = "atcm", "btcm";
1495 ti,sci-dev-id = <343>;
1496 ti,sci-proc-ids = <0x0a 0xff>;
1498 firmware-name = "j784s4-main-r5f2_0-fw";
1499 ti,atcm-enable = <1>;
1500 ti,btcm-enable = <1>;
1504 main_r5fss2_core1: r5f@5a00000 {
1505 compatible = "ti,j721s2-r5f";
1508 reg-names = "atcm", "btcm";
1510 ti,sci-dev-id = <344>;
1511 ti,sci-proc-ids = <0x0b 0xff>;
1513 firmware-name = "j784s4-main-r5f2_1-fw";
1514 ti,atcm-enable = <1>;
1515 ti,btcm-enable = <1>;
1521 compatible = "ti,j721s2-c71-dsp";
1524 reg-names = "l2sram", "l1dram";
1526 ti,sci-dev-id = <30>;
1527 ti,sci-proc-ids = <0x30 0xff>;
1529 firmware-name = "j784s4-c71_0-fw";
1534 compatible = "ti,j721s2-c71-dsp";
1537 reg-names = "l2sram", "l1dram";
1539 ti,sci-dev-id = <33>;
1540 ti,sci-proc-ids = <0x31 0xff>;
1542 firmware-name = "j784s4-c71_1-fw";
1547 compatible = "ti,j721s2-c71-dsp";
1550 reg-names = "l2sram", "l1dram";
1552 ti,sci-dev-id = <37>;
1553 ti,sci-proc-ids = <0x32 0xff>;
1555 firmware-name = "j784s4-c71_2-fw";
1560 compatible = "ti,j721s2-c71-dsp";
1563 reg-names = "l2sram", "l1dram";
1565 ti,sci-dev-id = <40>;
1566 ti,sci-proc-ids = <0x33 0xff>;
1568 firmware-name = "j784s4-c71_3-fw";