Lines Matching +full:0 +full:x35000000
11 reg = <0x00 0x70000000 0x00 0x800000>;
14 ranges = <0x00 0x00 0x70000000 0x800000>;
16 atf-sram@0 {
17 reg = <0x00 0x20000>;
21 reg = <0x1f0000 0x10000>;
25 reg = <0x200000 0x200000>;
36 reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */
37 <0x00 0x01900000 0x00 0x100000>, /* GICR */
38 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
39 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
40 <0x00 0x6f020000 0x00 0x2000>; /* GICV */
47 reg = <0x00 0x01820000 0x00 0x10000>;
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
56 reg = <0x00 0x00a00000 0x00 0x800>;
68 /* Proxy 0 addressing */
69 reg = <0x00 0x11c000 0x00 0x120>;
72 pinctrl-single,function-mask = <0xffffffff>;
78 reg = <0x00 0x104200 0x00 0x50>;
81 pinctrl-single,function-mask = <0x00000007>;
87 reg = <0x00 0x104280 0x00 0x20>;
90 pinctrl-single,function-mask = <0x0000001f>;
95 reg = <0x00 0x4e00000 0x00 0x1200>;
99 ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;
101 dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,
102 <&main_udmap 0x4a41>;
107 reg = <0x00 0x4e10000 0x00 0x7d>;
114 reg = <0x00 0x2400000 0x00 0x400>;
126 reg = <0x00 0x2410000 0x00 0x400>;
138 reg = <0x00 0x2420000 0x00 0x400>;
150 reg = <0x00 0x2430000 0x00 0x400>;
162 reg = <0x00 0x2440000 0x00 0x400>;
174 reg = <0x00 0x2450000 0x00 0x400>;
186 reg = <0x00 0x2460000 0x00 0x400>;
198 reg = <0x00 0x2470000 0x00 0x400>;
210 reg = <0x00 0x2480000 0x00 0x400>;
222 reg = <0x00 0x2490000 0x00 0x400>;
234 reg = <0x00 0x24a0000 0x00 0x400>;
246 reg = <0x00 0x24b0000 0x00 0x400>;
258 reg = <0x00 0x24c0000 0x00 0x400>;
270 reg = <0x00 0x24d0000 0x00 0x400>;
282 reg = <0x00 0x24e0000 0x00 0x400>;
294 reg = <0x00 0x24f0000 0x00 0x400>;
306 reg = <0x00 0x2500000 0x00 0x400>;
318 reg = <0x00 0x2510000 0x00 0x400>;
330 reg = <0x00 0x2520000 0x00 0x400>;
342 reg = <0x00 0x2530000 0x00 0x400>;
354 reg = <0x00 0x02800000 0x00 0x200>;
357 clocks = <&k3_clks 146 0>;
365 reg = <0x00 0x02810000 0x00 0x200>;
368 clocks = <&k3_clks 388 0>;
376 reg = <0x00 0x02820000 0x00 0x200>;
379 clocks = <&k3_clks 389 0>;
387 reg = <0x00 0x02830000 0x00 0x200>;
390 clocks = <&k3_clks 390 0>;
398 reg = <0x00 0x02840000 0x00 0x200>;
401 clocks = <&k3_clks 391 0>;
409 reg = <0x00 0x02850000 0x00 0x200>;
412 clocks = <&k3_clks 392 0>;
420 reg = <0x00 0x02860000 0x00 0x200>;
423 clocks = <&k3_clks 393 0>;
431 reg = <0x00 0x02870000 0x00 0x200>;
434 clocks = <&k3_clks 394 0>;
442 reg = <0x00 0x02880000 0x00 0x200>;
445 clocks = <&k3_clks 395 0>;
453 reg = <0x00 0x02890000 0x00 0x200>;
456 clocks = <&k3_clks 396 0>;
464 reg = <0x00 0x00600000 0x00 0x100>;
472 ti,davinci-gpio-unbanked = <0>;
474 clocks = <&k3_clks 163 0>;
481 reg = <0x00 0x00610000 0x00 0x100>;
489 ti,davinci-gpio-unbanked = <0>;
491 clocks = <&k3_clks 164 0>;
498 reg = <0x00 0x00620000 0x00 0x100>;
506 ti,davinci-gpio-unbanked = <0>;
508 clocks = <&k3_clks 165 0>;
515 reg = <0x00 0x00630000 0x00 0x100>;
523 ti,davinci-gpio-unbanked = <0>;
525 clocks = <&k3_clks 166 0>;
532 reg = <0x00 0x02000000 0x00 0x100>;
535 #size-cells = <0>;
544 reg = <0x00 0x02010000 0x00 0x100>;
547 #size-cells = <0>;
556 reg = <0x00 0x02020000 0x00 0x100>;
559 #size-cells = <0>;
568 reg = <0x00 0x02030000 0x00 0x100>;
571 #size-cells = <0>;
580 reg = <0x00 0x02040000 0x00 0x100>;
583 #size-cells = <0>;
592 reg = <0x00 0x02050000 0x00 0x100>;
595 #size-cells = <0>;
604 reg = <0x00 0x02060000 0x00 0x100>;
607 #size-cells = <0>;
616 reg = <0x00 0x04f80000 0x00 0x1000>,
617 <0x00 0x04f88000 0x00 0x400>;
625 ti,otap-del-sel-legacy = <0x0>;
626 ti,otap-del-sel-mmc-hs = <0x0>;
627 ti,otap-del-sel-ddr52 = <0x6>;
628 ti,otap-del-sel-hs200 = <0x8>;
629 ti,otap-del-sel-hs400 = <0x5>;
630 ti,itap-del-sel-legacy = <0x10>;
631 ti,itap-del-sel-mmc-hs = <0xa>;
632 ti,strobe-sel = <0x77>;
633 ti,clkbuf-sel = <0x7>;
634 ti,trm-icp = <0x8>;
644 reg = <0x00 0x04fb0000 0x00 0x1000>,
645 <0x00 0x04fb8000 0x00 0x400>;
653 ti,otap-del-sel-legacy = <0x0>;
654 ti,otap-del-sel-sd-hs = <0x0>;
655 ti,otap-del-sel-sdr12 = <0xf>;
656 ti,otap-del-sel-sdr25 = <0xf>;
657 ti,otap-del-sel-sdr50 = <0xc>;
658 ti,otap-del-sel-sdr104 = <0x5>;
659 ti,otap-del-sel-ddr50 = <0xc>;
660 ti,itap-del-sel-legacy = <0x0>;
661 ti,itap-del-sel-sd-hs = <0x0>;
662 ti,itap-del-sel-sdr12 = <0x0>;
663 ti,itap-del-sel-sdr25 = <0x0>;
664 ti,clkbuf-sel = <0x7>;
665 ti,trm-icp = <0x8>;
667 sdhci-caps-mask = <0x00000003 0x00000000>;
677 ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
684 reg = <0x00 0x310e0000 0x00 0x4000>;
691 ti,interrupt-ranges = <0 64 64>,
698 reg = <0x00 0x33d00000 0x00 0x100000>;
700 #interrupt-cells = <0>;
705 ti,interrupt-ranges = <0 0 256>;
713 reg = <0x00 0x32c00000 0x00 0x100000>,
714 <0x00 0x32400000 0x00 0x100000>,
715 <0x00 0x32800000 0x00 0x100000>;
722 reg = <0x00 0x30e00000 0x00 0x1000>;
728 reg = <0x00 0x31f80000 0x00 0x200>;
738 reg = <0x00 0x31f81000 0x00 0x200>;
748 reg = <0x00 0x31f82000 0x00 0x200>;
758 reg = <0x00 0x31f83000 0x00 0x200>;
768 reg = <0x00 0x31f84000 0x00 0x200>;
778 reg = <0x00 0x31f85000 0x00 0x200>;
788 reg = <0x00 0x31f86000 0x00 0x200>;
798 reg = <0x00 0x31f87000 0x00 0x200>;
808 reg = <0x00 0x31f88000 0x00 0x200>;
818 reg = <0x00 0x31f89000 0x00 0x200>;
828 reg = <0x00 0x31f8a000 0x00 0x200>;
838 reg = <0x00 0x31f8b000 0x00 0x200>;
848 reg = <0x00 0x31f90000 0x00 0x200>;
858 reg = <0x00 0x31f91000 0x00 0x200>;
868 reg = <0x00 0x31f92000 0x00 0x200>;
878 reg = <0x00 0x31f93000 0x00 0x200>;
888 reg = <0x00 0x31f94000 0x00 0x200>;
898 reg = <0x00 0x31f95000 0x00 0x200>;
908 reg = <0x00 0x31f96000 0x00 0x200>;
918 reg = <0x00 0x31f97000 0x00 0x200>;
928 reg = <0x00 0x31f98000 0x00 0x200>;
938 reg = <0x00 0x31f99000 0x00 0x200>;
948 reg = <0x00 0x31f9a000 0x00 0x200>;
958 reg = <0x00 0x31f9b000 0x00 0x200>;
968 reg = <0x00 0x3c000000 0x00 0x400000>,
969 <0x00 0x38000000 0x00 0x400000>,
970 <0x00 0x31120000 0x00 0x100>,
971 <0x00 0x33000000 0x00 0x40000>,
972 <0x00 0x31080000 0x00 0x40000>;
975 ti,sci-rm-range-gp-rings = <0x1>;
983 reg = <0x00 0x31150000 0x00 0x100>,
984 <0x00 0x34000000 0x00 0x80000>,
985 <0x00 0x35000000 0x00 0x200000>;
994 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
995 <0x0f>, /* TX_HCHAN */
996 <0x10>; /* TX_UHCHAN */
997 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
998 <0x0b>, /* RX_HCHAN */
999 <0x0c>; /* RX_UHCHAN */
1000 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
1005 reg = <0x00 0x310d0000 0x00 0x400>;
1007 clocks = <&k3_clks 282 0>;
1020 reg = <0x00 0x02701000 0x00 0x200>,
1021 <0x00 0x02708000 0x00 0x8000>;
1029 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1035 reg = <0x00 0x02711000 0x00 0x200>,
1036 <0x00 0x02718000 0x00 0x8000>;
1044 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1050 reg = <0x00 0x02721000 0x00 0x200>,
1051 <0x00 0x02728000 0x00 0x8000>;
1059 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1065 reg = <0x00 0x02731000 0x00 0x200>,
1066 <0x00 0x02738000 0x00 0x8000>;
1074 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1080 reg = <0x00 0x02741000 0x00 0x200>,
1081 <0x00 0x02748000 0x00 0x8000>;
1089 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1095 reg = <0x00 0x02751000 0x00 0x200>,
1096 <0x00 0x02758000 0x00 0x8000>;
1104 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1110 reg = <0x00 0x02761000 0x00 0x200>,
1111 <0x00 0x02768000 0x00 0x8000>;
1119 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1125 reg = <0x00 0x02771000 0x00 0x200>,
1126 <0x00 0x02778000 0x00 0x8000>;
1134 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1140 reg = <0x00 0x02781000 0x00 0x200>,
1141 <0x00 0x02788000 0x00 0x8000>;
1149 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1155 reg = <0x00 0x02791000 0x00 0x200>,
1156 <0x00 0x02798000 0x00 0x8000>;
1164 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1170 reg = <0x00 0x027a1000 0x00 0x200>,
1171 <0x00 0x027a8000 0x00 0x8000>;
1179 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1185 reg = <0x00 0x027b1000 0x00 0x200>,
1186 <0x00 0x027b8000 0x00 0x8000>;
1194 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1200 reg = <0x00 0x027c1000 0x00 0x200>,
1201 <0x00 0x027c8000 0x00 0x8000>;
1209 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1215 reg = <0x00 0x027d1000 0x00 0x200>,
1216 <0x00 0x027d8000 0x00 0x8000>;
1224 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1230 reg = <0x00 0x02681000 0x00 0x200>,
1231 <0x00 0x02688000 0x00 0x8000>;
1239 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1245 reg = <0x00 0x02691000 0x00 0x200>,
1246 <0x00 0x02698000 0x00 0x8000>;
1254 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1260 reg = <0x00 0x026a1000 0x00 0x200>,
1261 <0x00 0x026a8000 0x00 0x8000>;
1269 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1275 reg = <0x00 0x026b1000 0x00 0x200>,
1276 <0x00 0x026b8000 0x00 0x8000>;
1284 bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
1290 reg = <0x00 0x02100000 0x00 0x400>;
1293 #size-cells = <0>;
1301 reg = <0x00 0x02110000 0x00 0x400>;
1304 #size-cells = <0>;
1312 reg = <0x00 0x02120000 0x00 0x400>;
1315 #size-cells = <0>;
1323 reg = <0x00 0x02130000 0x00 0x400>;
1326 #size-cells = <0>;
1334 reg = <0x00 0x02140000 0x00 0x400>;
1337 #size-cells = <0>;
1345 reg = <0x00 0x02150000 0x00 0x400>;
1348 #size-cells = <0>;
1356 reg = <0x00 0x02160000 0x00 0x400>;
1359 #size-cells = <0>;
1367 reg = <0x00 0x02170000 0x00 0x400>;
1370 #size-cells = <0>;
1378 reg = <0x00 0x4e80000 0x00 0x100>;
1390 reg = <0x00 0x4e84000 0x00 0x10000>;
1405 ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
1406 <0x5d00000 0x00 0x5d00000 0x20000>;
1411 reg = <0x5c00000 0x00010000>,
1412 <0x5c10000 0x00010000>;
1416 ti,sci-proc-ids = <0x06 0xff>;
1426 reg = <0x5d00000 0x00010000>,
1427 <0x5d10000 0x00010000>;
1431 ti,sci-proc-ids = <0x07 0xff>;
1445 ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
1446 <0x5f00000 0x00 0x5f00000 0x20000>;
1451 reg = <0x5e00000 0x00010000>,
1452 <0x5e10000 0x00010000>;
1456 ti,sci-proc-ids = <0x08 0xff>;
1466 reg = <0x5f00000 0x00010000>,
1467 <0x5f10000 0x00010000>;
1471 ti,sci-proc-ids = <0x09 0xff>;
1485 ranges = <0x5900000 0x00 0x5900000 0x20000>,
1486 <0x5a00000 0x00 0x5a00000 0x20000>;
1491 reg = <0x5900000 0x00010000>,
1492 <0x5910000 0x00010000>;
1496 ti,sci-proc-ids = <0x0a 0xff>;
1506 reg = <0x5a00000 0x00010000>,
1507 <0x5a10000 0x00010000>;
1511 ti,sci-proc-ids = <0x0b 0xff>;
1522 reg = <0x00 0x64800000 0x00 0x00080000>,
1523 <0x00 0x64e00000 0x00 0x0000c000>;
1527 ti,sci-proc-ids = <0x30 0xff>;
1535 reg = <0x00 0x65800000 0x00 0x00080000>,
1536 <0x00 0x65e00000 0x00 0x0000c000>;
1540 ti,sci-proc-ids = <0x31 0xff>;
1548 reg = <0x00 0x66800000 0x00 0x00080000>,
1549 <0x00 0x66e00000 0x00 0x0000c000>;
1553 ti,sci-proc-ids = <0x32 0xff>;
1561 reg = <0x00 0x67800000 0x00 0x00080000>,
1562 <0x00 0x67e00000 0x00 0x0000c000>;
1566 ti,sci-proc-ids = <0x33 0xff>;