dts/ti/k3-j721s2-common-proc-board.dts

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2-som-p0.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-cadence.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-serdes.h"
18 	compatible = "ti,j721s2-evm", "ti,j721s2";
22 		stdout-path = "serial2:115200n8";
37 	evm_12v0: fixedregulator-evm12v0 {
39 		compatible = "regulator-fixed";
40 		regulator-name = "evm_12v0";
41 		regulator-min-microvolt = <12000000>;
42 		regulator-max-microvolt = <12000000>;
43 		regulator-always-on;
44 		regulator-boot-on;
47 	vsys_3v3: fixedregulator-vsys3v3 {
48 		/* Output of LM5140 */
49 		compatible = "regulator-fixed";
50 		regulator-name = "vsys_3v3";
51 		regulator-min-microvolt = <3300000>;
52 		regulator-max-microvolt = <3300000>;
53 		vin-supply = <&evm_12v0>;
54 		regulator-always-on;
55 		regulator-boot-on;
58 	vsys_5v0: fixedregulator-vsys5v0 {
59 		/* Output of LM5140 */
60 		compatible = "regulator-fixed";
61 		regulator-name = "vsys_5v0";
62 		regulator-min-microvolt = <5000000>;
63 		regulator-max-microvolt = <5000000>;
64 		vin-supply = <&evm_12v0>;
65 		regulator-always-on;
66 		regulator-boot-on;
69 	vdd_mmc1: fixedregulator-sd {
70 		/* Output of TPS22918 */
71 		compatible = "regulator-fixed";
72 		regulator-name = "vdd_mmc1";
73 		regulator-min-microvolt = <3300000>;
74 		regulator-max-microvolt = <3300000>;
75 		regulator-boot-on;
76 		enable-active-high;
77 		vin-supply = <&vsys_3v3>;
81 	vdd_sd_dv: gpio-regulator-TLV71033 {
82 		/* Output of TLV71033 */
83 		compatible = "regulator-gpio";
84 		regulator-name = "tlv71033";
85 		pinctrl-names = "default";
86 		pinctrl-0 = <&vdd_sd_dv_pins_default>;
87 		regulator-min-microvolt = <1800000>;
88 		regulator-max-microvolt = <3300000>;
89 		regulator-boot-on;
90 		vin-supply = <&vsys_5v0>;
96 	transceiver1: can-phy1 {
98 		#phy-cells = <0>;
99 		max-bitrate = <5000000>;
100 		pinctrl-names = "default";
101 		pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
102 		standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
103 		enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
106 	transceiver2: can-phy2 {
108 		#phy-cells = <0>;
109 		max-bitrate = <5000000>;
110 		pinctrl-names = "default";
111 		pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
112 		standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
115 	transceiver3: can-phy3 {
117 		#phy-cells = <0>;
118 		max-bitrate = <5000000>;
119 		standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>;
120 		enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
121 		mux-states = <&mux0 1>;
124 	transceiver4: can-phy4 {
126 		#phy-cells = <0>;
127 		max-bitrate = <5000000>;
128 		standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>;
129 		mux-states = <&mux1 1>;
134 	main_uart8_pins_default: main-uart8-default-pins {
135 		pinctrl-single,pins = <
143 	main_i2c3_pins_default: main-i2c3-default-pins {
144 		pinctrl-single,pins = <
150 	main_mmc1_pins_default: main-mmc1-default-pins {
151 		pinctrl-single,pins = <
163 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
164 		pinctrl-single,pins = <
169 	main_usbss0_pins_default: main-usbss0-default-pins {
170 		pinctrl-single,pins = <
175 	main_mcan3_pins_default: main-mcan3-default-pins {
176 		pinctrl-single,pins = <
182 	main_mcan5_pins_default: main-mcan5-default-pins {
183 		pinctrl-single,pins = <
191 	wkup_uart0_pins_default: wkup-uart0-default-pins {
192 		pinctrl-single,pins = <
198 	mcu_uart0_pins_default: mcu-uart0-default-pins {
199 		pinctrl-single,pins = <
207 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
208 		pinctrl-single,pins = <
224 	mcu_mdio_pins_default: mcu-mdio-default-pins {
225 		pinctrl-single,pins = <
231 	mcu_mcan0_pins_default: mcu-mcan0-default-pins {
232 		pinctrl-single,pins = <
238 	mcu_mcan1_pins_default: mcu-mcan1-default-pins {
239 		pinctrl-single,pins = <
245 	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
246 		pinctrl-single,pins = <
252 	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
253 		pinctrl-single,pins = <
258 	mcu_adc0_pins_default: mcu-adc0-default-pins {
259 		pinctrl-single,pins = <
271 	mcu_adc1_pins_default: mcu-adc1-default-pins {
272 		pinctrl-single,pins = <
286 	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
287 		pinctrl-single,pins = <
310 	pinctrl-names = "default";
311 	pinctrl-0 = <&wkup_uart0_pins_default>;
316 	pinctrl-names = "default";
317 	pinctrl-0 = <&mcu_uart0_pins_default>;
322 	pinctrl-names = "default";
323 	pinctrl-0 = <&main_uart8_pins_default>;
325 	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
329 	clock-frequency = <400000>;
334 		gpio-controller;
335 		#gpio-cells = <2>;
336 		gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
346 		gpio-controller;
347 		#gpio-cells = <2>;
348 		gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
360 	non-removable;
361 	ti,driver-strength-ohm = <50>;
362 	disable-wp;
368 	pinctrl-0 = <&main_mmc1_pins_default>;
369 	pinctrl-names = "default";
370 	disable-wp;
371 	vmmc-supply = <&vdd_mmc1>;
372 	vqmmc-supply = <&vdd_sd_dv>;
376 	pinctrl-names = "default";
377 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
381 	phy0: ethernet-phy@0 {
383 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
384 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
385 		ti,min-output-impedance;
390 	phy-mode = "rgmii-rxid";
391 	phy-handle = <&phy0>;
395 	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
400 	clock-frequency = <100000000>;
407 		cdns,num-lanes = <1>;
408 		#phy-cells = <0>;
409 		cdns,phy-type = <PHY_TYPE_PCIE>;
415 	idle-states = <1>; /* USB0 to SERDES lane 1 */
420 	pinctrl-0 = <&main_usbss0_pins_default>;
421 	pinctrl-names = "default";
422 	ti,vbus-divider;
423 	ti,usb2-only;
428 	maximum-speed = "high-speed";
433 	pinctrl-names = "default";
434 	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
437 		compatible = "jedec,spi-nor";
439 		spi-tx-bus-width = <1>;
440 		spi-rx-bus-width = <4>;
441 		spi-max-frequency = <40000000>;
442 		cdns,tshsl-ns = <60>;
443 		cdns,tsd2d-ns = <60>;
444 		cdns,tchsh-ns = <60>;
445 		cdns,tslch-ns = <60>;
446 		cdns,read-delay = <2>;
452 	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
454 	phy-names = "pcie-phy";
455 	num-lanes = <1>;
460 	pinctrl-names = "default";
461 	pinctrl-0 = <&mcu_mcan0_pins_default>;
467 	pinctrl-names = "default";
468 	pinctrl-0 = <&mcu_mcan1_pins_default>;
473 	pinctrl-0 = <&mcu_adc0_pins_default>;
474 	pinctrl-names = "default";
477 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
482 	pinctrl-0 = <&mcu_adc1_pins_default>;
483 	pinctrl-names = "default";
486 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
492 	pinctrl-names = "default";
493 	pinctrl-0 = <&main_mcan3_pins_default>;
499 	pinctrl-names = "default";
500 	pinctrl-0 = <&main_mcan5_pins_default>;