dts/ti/k3-j721e-som-p0.dtsi

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
20 	reserved_memory: reserved-memory {
21 		#address-cells = <2>;
22 		#size-cells = <2>;
28 			no-map;
31 		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
32 			compatible = "shared-dma-pool";
34 			no-map;
37 		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
38 			compatible = "shared-dma-pool";
40 			no-map;
43 		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
44 			compatible = "shared-dma-pool";
46 			no-map;
49 		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
50 			compatible = "shared-dma-pool";
52 			no-map;
55 		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
56 			compatible = "shared-dma-pool";
58 			no-map;
61 		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
62 			compatible = "shared-dma-pool";
64 			no-map;
67 		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
68 			compatible = "shared-dma-pool";
70 			no-map;
73 		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
74 			compatible = "shared-dma-pool";
76 			no-map;
79 		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
80 			compatible = "shared-dma-pool";
82 			no-map;
85 		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
86 			compatible = "shared-dma-pool";
88 			no-map;
91 		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
92 			compatible = "shared-dma-pool";
94 			no-map;
97 		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
98 			compatible = "shared-dma-pool";
100 			no-map;
103 		c66_1_dma_memory_region: c66-dma-memory@a6000000 {
104 			compatible = "shared-dma-pool";
106 			no-map;
109 		c66_0_memory_region: c66-memory@a6100000 {
110 			compatible = "shared-dma-pool";
112 			no-map;
115 		c66_0_dma_memory_region: c66-dma-memory@a7000000 {
116 			compatible = "shared-dma-pool";
118 			no-map;
121 		c66_1_memory_region: c66-memory@a7100000 {
122 			compatible = "shared-dma-pool";
124 			no-map;
127 		c71_0_dma_memory_region: c71-dma-memory@a8000000 {
128 			compatible = "shared-dma-pool";
130 			no-map;
133 		c71_0_memory_region: c71-memory@a8100000 {
134 			compatible = "shared-dma-pool";
136 			no-map;
139 		rtos_ipc_memory_region: ipc-memories@aa000000 {
142 			no-map;
148 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
149 		pinctrl-single,pins = <
155 	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
156 		pinctrl-single,pins = <
171 	mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
172 		pinctrl-single,pins = <
193 	pinctrl-names = "default";
194 	pinctrl-0 = <&wkup_i2c0_pins_default>;
195 	clock-frequency = <400000>;
198 		/* CAV24C256WE-GT3 */
206 	pinctrl-names = "default";
207 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
210 		compatible = "jedec,spi-nor";
212 		spi-tx-bus-width = <8>;
213 		spi-rx-bus-width = <8>;
214 		spi-max-frequency = <25000000>;
215 		cdns,tshsl-ns = <60>;
216 		cdns,tsd2d-ns = <60>;
217 		cdns,tchsh-ns = <60>;
218 		cdns,tslch-ns = <60>;
219 		cdns,read-delay = <0>;
222 			compatible = "fixed-partitions";
223 			#address-cells = <1>;
224 			#size-cells = <1>;
237 				label = "ospi.u-boot";
274 	pinctrl-names = "default";
275 	pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
280 		compatible = "cypress,hyperflash", "cfi-flash";
284 			compatible = "fixed-partitions";
285 			#address-cells = <1>;
286 			#size-cells = <1>;
299 				label = "hbmc.u-boot";
325 	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
326 		ti,mbox-rx = <0 0 0>;
327 		ti,mbox-tx = <1 0 0>;
330 	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
331 		ti,mbox-rx = <2 0 0>;
332 		ti,mbox-tx = <3 0 0>;
340 	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
341 		ti,mbox-rx = <0 0 0>;
342 		ti,mbox-tx = <1 0 0>;
345 	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
346 		ti,mbox-rx = <2 0 0>;
347 		ti,mbox-tx = <3 0 0>;
355 	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
356 		ti,mbox-rx = <0 0 0>;
357 		ti,mbox-tx = <1 0 0>;
360 	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
361 		ti,mbox-rx = <2 0 0>;
362 		ti,mbox-tx = <3 0 0>;
370 	mbox_c66_0: mbox-c66-0 {
371 		ti,mbox-rx = <0 0 0>;
372 		ti,mbox-tx = <1 0 0>;
375 	mbox_c66_1: mbox-c66-1 {
376 		ti,mbox-rx = <2 0 0>;
377 		ti,mbox-tx = <3 0 0>;
385 	mbox_c71_0: mbox-c71-0 {
386 		ti,mbox-rx = <0 0 0>;
387 		ti,mbox-tx = <1 0 0>;
393 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
399 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
405 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
411 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
417 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
423 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
430 	memory-region = <&c66_0_dma_memory_region>,
437 	memory-region = <&c66_1_dma_memory_region>,
444 	memory-region = <&c71_0_dma_memory_region>,