Lines Matching +full:sci +full:- +full:proc +full:- +full:ids
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
26 k3_clks: clock-controller {
27 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
38 compatible = "syscon", "simple-mfd";
40 #address-cells = <1>;
41 #size-cells = <1>;
45 compatible = "ti,am654-phy-gmii-sel";
47 #phy-cells = <1>;
52 compatible = "ti,am654-chipid";
57 compatible = "pinctrl-single";
60 #pinctrl-cells = <1>;
61 pinctrl-single,register-width = <32>;
62 pinctrl-single,function-mask = <0xffffffff>;
67 compatible = "pinctrl-single";
69 #pinctrl-cells = <1>;
70 pinctrl-single,register-width = <32>;
71 pinctrl-single,function-mask = <0x0000000f>;
72 /* Non-MPU Firmware usage */
78 compatible = "pinctrl-single";
80 #pinctrl-cells = <1>;
81 pinctrl-single,register-width = <32>;
82 pinctrl-single,function-mask = <0x0000000f>;
83 /* Non-MPU Firmware usage */
88 compatible = "mmio-sram";
91 #address-cells = <1>;
92 #size-cells = <1>;
96 compatible = "ti,am654-timer";
100 clock-names = "fck";
101 assigned-clocks = <&k3_clks 35 1>;
102 assigned-clock-parents = <&k3_clks 35 2>;
103 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
104 ti,timer-pwm;
105 /* Non-MPU Firmware usage */
110 compatible = "ti,am654-timer";
114 clock-names = "fck";
115 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 322 0>;
116 assigned-clock-parents = <&k3_clks 71 2>, <&k3_clks 322 1>;
117 power-domains = <&k3_pds 71 TI_SCI_PD_EXCLUSIVE>;
118 ti,timer-pwm;
119 /* Non-MPU Firmware usage */
124 compatible = "ti,am654-timer";
128 clock-names = "fck";
129 assigned-clocks = <&k3_clks 72 1>;
130 assigned-clock-parents = <&k3_clks 72 2>;
131 power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
132 ti,timer-pwm;
133 /* Non-MPU Firmware usage */
138 compatible = "ti,am654-timer";
142 clock-names = "fck";
143 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 323 0>;
144 assigned-clock-parents = <&k3_clks 73 2>, <&k3_clks 323 1>;
145 power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
146 ti,timer-pwm;
147 /* Non-MPU Firmware usage */
152 compatible = "ti,am654-timer";
156 clock-names = "fck";
157 assigned-clocks = <&k3_clks 74 1>;
158 assigned-clock-parents = <&k3_clks 74 2>;
159 power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
160 ti,timer-pwm;
161 /* Non-MPU Firmware usage */
166 compatible = "ti,am654-timer";
170 clock-names = "fck";
171 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 324 0>;
172 assigned-clock-parents = <&k3_clks 75 2>, <&k3_clks 324 1>;
173 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
174 ti,timer-pwm;
175 /* Non-MPU Firmware usage */
180 compatible = "ti,am654-timer";
184 clock-names = "fck";
185 assigned-clocks = <&k3_clks 76 1>;
186 assigned-clock-parents = <&k3_clks 76 2>;
187 power-domains = <&k3_pds 76 TI_SCI_PD_EXCLUSIVE>;
188 ti,timer-pwm;
189 /* Non-MPU Firmware usage */
194 compatible = "ti,am654-timer";
198 clock-names = "fck";
199 assigned-clocks = <&k3_clks 77 1>, <&k3_clks 325 0>;
200 assigned-clock-parents = <&k3_clks 77 2>, <&k3_clks 325 1>;
201 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
202 ti,timer-pwm;
203 /* Non-MPU Firmware usage */
208 compatible = "ti,am654-timer";
212 clock-names = "fck";
213 assigned-clocks = <&k3_clks 78 1>;
214 assigned-clock-parents = <&k3_clks 78 2>;
215 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
216 ti,timer-pwm;
217 /* Non-MPU Firmware usage */
222 compatible = "ti,am654-timer";
226 clock-names = "fck";
227 assigned-clocks = <&k3_clks 79 1>, <&k3_clks 326 0>;
228 assigned-clock-parents = <&k3_clks 79 2>, <&k3_clks 326 1>;
229 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
230 ti,timer-pwm;
231 /* Non-MPU Firmware usage */
235 compatible = "ti,j721e-uart", "ti,am654-uart";
238 clock-frequency = <48000000>;
239 current-speed = <115200>;
240 power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
242 clock-names = "fclk";
247 compatible = "ti,j721e-uart", "ti,am654-uart";
250 clock-frequency = <96000000>;
251 current-speed = <115200>;
252 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
254 clock-names = "fclk";
258 wkup_gpio_intr: interrupt-controller@42200000 {
259 compatible = "ti,sci-intr";
261 ti,intr-trigger-type = <1>;
262 interrupt-controller;
263 interrupt-parent = <&gic500>;
264 #interrupt-cells = <1>;
265 ti,sci = <&dmsc>;
266 ti,sci-dev-id = <137>;
267 ti,interrupt-ranges = <16 960 16>;
271 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
273 gpio-controller;
274 #gpio-cells = <2>;
275 interrupt-parent = <&wkup_gpio_intr>;
277 interrupt-controller;
278 #interrupt-cells = <2>;
280 ti,davinci-gpio-unbanked = <0>;
281 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
283 clock-names = "gpio";
288 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
290 gpio-controller;
291 #gpio-cells = <2>;
292 interrupt-parent = <&wkup_gpio_intr>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
297 ti,davinci-gpio-unbanked = <0>;
298 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
300 clock-names = "gpio";
305 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
308 #address-cells = <1>;
309 #size-cells = <0>;
310 clock-names = "fck";
312 power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
317 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
320 #address-cells = <1>;
321 #size-cells = <0>;
322 clock-names = "fck";
324 power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
329 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
332 #address-cells = <1>;
333 #size-cells = <0>;
334 clock-names = "fck";
336 power-domains = <&k3_pds 197 TI_SCI_PD_SHARED>;
341 compatible = "simple-bus";
343 #address-cells = <2>;
344 #size-cells = <2>;
347 hbmc_mux: mux-controller@47000004 {
348 compatible = "reg-mux";
350 #mux-control-cells = <1>;
351 mux-reg-masks = <0x4 0x2>; /* HBMC select */
355 compatible = "ti,am654-hbmc";
358 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
360 assigned-clocks = <&k3_clks 102 5>;
361 assigned-clock-rates = <333333333>;
362 #address-cells = <2>;
363 #size-cells = <1>;
364 mux-controls = <&hbmc_mux 0>;
369 compatible = "ti,am654-ospi", "cdns,qspi-nor";
373 cdns,fifo-depth = <256>;
374 cdns,fifo-width = <4>;
375 cdns,trigger-address = <0x0>;
377 assigned-clocks = <&k3_clks 103 0>;
378 assigned-clock-parents = <&k3_clks 103 2>;
379 assigned-clock-rates = <166666666>;
380 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
381 #address-cells = <1>;
382 #size-cells = <0>;
387 compatible = "ti,am654-ospi", "cdns,qspi-nor";
391 cdns,fifo-depth = <256>;
392 cdns,fifo-width = <4>;
393 cdns,trigger-address = <0x0>;
395 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
396 #address-cells = <1>;
397 #size-cells = <0>;
403 compatible = "ti,am3359-tscadc";
406 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
408 assigned-clocks = <&k3_clks 0 3>;
409 assigned-clock-rates = <60000000>;
410 clock-names = "fck";
413 dma-names = "fifo0", "fifo1";
417 #io-channel-cells = <1>;
418 compatible = "ti,am3359-adc";
423 compatible = "ti,am3359-tscadc";
426 power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
428 assigned-clocks = <&k3_clks 1 3>;
429 assigned-clock-rates = <60000000>;
430 clock-names = "fck";
433 dma-names = "fifo0", "fifo1";
437 #io-channel-cells = <1>;
438 compatible = "ti,am3359-adc";
443 compatible = "simple-mfd";
444 #address-cells = <2>;
445 #size-cells = <2>;
447 dma-coherent;
448 dma-ranges;
450 ti,sci-dev-id = <232>;
453 compatible = "ti,am654-navss-ringacc";
459 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
460 ti,num-rings = <286>;
461 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
462 ti,sci = <&dmsc>;
463 ti,sci-dev-id = <235>;
464 msi-parent = <&main_udmass_inta>;
467 mcu_udmap: dma-controller@285c0000 {
468 compatible = "ti,j721e-navss-mcu-udmap";
472 reg-names = "gcfg", "rchanrt", "tchanrt";
473 msi-parent = <&main_udmass_inta>;
474 #dma-cells = <1>;
476 ti,sci = <&dmsc>;
477 ti,sci-dev-id = <236>;
480 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
482 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
484 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
489 compatible = "ti,am654-secure-proxy";
490 #mbox-cells = <1>;
491 reg-names = "target_data", "rt", "scfg";
498 * firmware on non-MPU processors
504 compatible = "ti,j721e-cpsw-nuss";
505 #address-cells = <2>;
506 #size-cells = <2>;
508 reg-names = "cpsw_nuss";
510 dma-coherent;
512 clock-names = "fck";
513 power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
524 dma-names = "tx0", "tx1", "tx2", "tx3",
528 ethernet-ports {
529 #address-cells = <1>;
530 #size-cells = <0>;
534 ti,mac-only;
536 ti,syscon-efuse = <&mcu_conf 0x200>;
542 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
544 #address-cells = <1>;
545 #size-cells = <0>;
547 clock-names = "fck";
552 compatible = "ti,am65-cpts";
555 clock-names = "cpts";
556 interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
557 interrupt-names = "cpts";
558 ti,cpts-ext-ts-inputs = <4>;
559 ti,cpts-periodic-outputs = <2>;
564 compatible = "ti,j721e-r5fss";
565 ti,cluster-mode = <1>;
566 #address-cells = <1>;
567 #size-cells = <1>;
570 power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
573 compatible = "ti,j721e-r5f";
576 reg-names = "atcm", "btcm";
577 ti,sci = <&dmsc>;
578 ti,sci-dev-id = <250>;
579 ti,sci-proc-ids = <0x01 0xff>;
581 firmware-name = "j7-mcu-r5f0_0-fw";
582 ti,atcm-enable = <1>;
583 ti,btcm-enable = <1>;
588 compatible = "ti,j721e-r5f";
591 reg-names = "atcm", "btcm";
592 ti,sci = <&dmsc>;
593 ti,sci-dev-id = <251>;
594 ti,sci-proc-ids = <0x02 0xff>;
596 firmware-name = "j7-mcu-r5f0_1-fw";
597 ti,atcm-enable = <1>;
598 ti,btcm-enable = <1>;
607 reg-names = "m_can", "message_ram";
608 power-domains = <&k3_pds 172 TI_SCI_PD_EXCLUSIVE>;
610 clock-names = "hclk", "cclk";
613 interrupt-names = "int0", "int1";
614 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
622 reg-names = "m_can", "message_ram";
623 power-domains = <&k3_pds 173 TI_SCI_PD_EXCLUSIVE>;
625 clock-names = "hclk", "cclk";
628 interrupt-names = "int0", "int1";
629 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
634 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
637 #address-cells = <1>;
638 #size-cells = <0>;
639 power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
645 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
648 #address-cells = <1>;
649 #size-cells = <0>;
650 power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
656 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
659 #address-cells = <1>;
660 #size-cells = <0>;
661 power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
666 wkup_vtm0: temperature-sensor@42040000 {
667 compatible = "ti,j721e-vtm";
671 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
672 #thermal-sensor-cells = <1>;