dts/ti/k3-j7200-common-proc-board.dts

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200-som-p0.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy.h>
13 #include "k3-serdes.h"
16 	compatible = "ti,j7200-evm", "ti,j7200";
30 		stdout-path = "serial2:115200n8";
33 	evm_12v0: fixedregulator-evm12v0 {
35 		compatible = "regulator-fixed";
36 		regulator-name = "evm_12v0";
37 		regulator-min-microvolt = <12000000>;
38 		regulator-max-microvolt = <12000000>;
39 		regulator-always-on;
40 		regulator-boot-on;
43 	vsys_3v3: fixedregulator-vsys3v3 {
45 		compatible = "regulator-fixed";
46 		regulator-name = "vsys_3v3";
47 		regulator-min-microvolt = <3300000>;
48 		regulator-max-microvolt = <3300000>;
49 		vin-supply = <&evm_12v0>;
50 		regulator-always-on;
51 		regulator-boot-on;
54 	vsys_5v0: fixedregulator-vsys5v0 {
56 		compatible = "regulator-fixed";
57 		regulator-name = "vsys_5v0";
58 		regulator-min-microvolt = <5000000>;
59 		regulator-max-microvolt = <5000000>;
60 		vin-supply = <&evm_12v0>;
61 		regulator-always-on;
62 		regulator-boot-on;
65 	vdd_mmc1: fixedregulator-sd {
67 		compatible = "regulator-fixed";
68 		regulator-name = "vdd_mmc1";
69 		regulator-min-microvolt = <3300000>;
70 		regulator-max-microvolt = <3300000>;
71 		regulator-boot-on;
72 		enable-active-high;
73 		vin-supply = <&vsys_3v3>;
77 	vdd_sd_dv: gpio-regulator-TLV71033 {
79 		compatible = "regulator-gpio";
80 		regulator-name = "tlv71033";
81 		pinctrl-names = "default";
82 		pinctrl-0 = <&vdd_sd_dv_pins_default>;
83 		regulator-min-microvolt = <1800000>;
84 		regulator-max-microvolt = <3300000>;
85 		regulator-boot-on;
86 		vin-supply = <&vsys_5v0>;
97 	mcu_uart0_pins_default: mcu-uart0-default-pins {
98 		pinctrl-single,pins = <
106 	wkup_uart0_pins_default: wkup-uart0-default-pins {
107 		pinctrl-single,pins = <
113 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
114 		pinctrl-single,pins = <
130 	wkup_gpio_pins_default: wkup-gpio-default-pins {
131 		pinctrl-single,pins = <
136 	mcu_mdio_pins_default: mcu-mdio1-default-pins {
137 		pinctrl-single,pins = <
145 	main_uart0_pins_default: main-uart0-default-pins {
146 		pinctrl-single,pins = <
154 	main_uart1_pins_default: main-uart1-default-pins {
155 		pinctrl-single,pins = <
161 	main_uart3_pins_default: main-uart3-default-pins {
162 		pinctrl-single,pins = <
168 	main_i2c1_pins_default: main-i2c1-default-pins {
169 		pinctrl-single,pins = <
175 	main_mmc1_pins_default: main-mmc1-default-pins {
176 		pinctrl-single,pins = <
188 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
189 		pinctrl-single,pins = <
196 	main_usbss0_pins_default: main-usbss0-default-pins {
197 		pinctrl-single,pins = <
206 	pinctrl-names = "default";
207 	pinctrl-0 = <&wkup_uart0_pins_default>;
212 	pinctrl-names = "default";
213 	pinctrl-0 = <&mcu_uart0_pins_default>;
219 	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
220 	pinctrl-names = "default";
221 	pinctrl-0 = <&main_uart0_pins_default>;
227 	pinctrl-names = "default";
228 	pinctrl-0 = <&main_uart1_pins_default>;
239 	pinctrl-names = "default";
240 	pinctrl-0 = <&main_uart3_pins_default>;
249 	pinctrl-names = "default";
250 	pinctrl-0 = <&wkup_gpio_pins_default>;
254 	pinctrl-names = "default";
255 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
259 	phy0: ethernet-phy@0 {
261 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
262 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
267 	phy-mode = "rgmii-rxid";
268 	phy-handle = <&phy0>;
273 	pinctrl-names = "default";
274 	pinctrl-0 = <&main_i2c0_pins_default>;
275 	clock-frequency = <400000>;
280 		gpio-controller;
281 		#gpio-cells = <2>;
287 		gpio-controller;
288 		#gpio-cells = <2>;
293  * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
294  * swapped on the CPB.
296  * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
297  * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
301 	pinctrl-names = "default";
302 	pinctrl-0 = <&main_i2c1_pins_default>;
303 	clock-frequency = <400000>;
308 		gpio-controller;
309 		#gpio-cells = <2>;
310 		gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
319 	non-removable;
320 	ti,driver-strength-ohm = <50>;
321 	disable-wp;
327 	pinctrl-0 = <&main_mmc1_pins_default>;
328 	pinctrl-names = "default";
329 	vmmc-supply = <&vdd_mmc1>;
330 	vqmmc-supply = <&vdd_sd_dv>;
331 	ti,driver-strength-ohm = <50>;
332 	disable-wp;
336 	idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
341 	idle-states = <1>; /* USB0 to SERDES lane 3 */
345 	pinctrl-names = "default";
346 	pinctrl-0 = <&main_usbss0_pins_default>;
347 	ti,vbus-divider;
348 	ti,usb2-only;
353 	maximum-speed = "high-speed";
358 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
363 	clock-frequency = <100000000>;
369 		cdns,num-lanes = <2>;
370 		#phy-cells = <0>;
371 		cdns,phy-type = <PHY_TYPE_PCIE>;
377 		cdns,num-lanes = <1>;
378 		#phy-cells = <0>;
379 		cdns,phy-type = <PHY_TYPE_QSGMII>;
385 	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
387 	phy-names = "pcie-phy";
388 	num-lanes = <2>;
393 	phy-names = "pcie-phy";
394 	num-lanes = <2>;