Lines Matching +full:num +full:- +full:ib +full:- +full:windows
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
31 compatible = "arm,gic-v3";
32 #address-cells = <2>;
33 #size-cells = <2>;
35 #interrupt-cells = <3>;
36 interrupt-controller;
48 gic_its: msi-controller@1820000 {
49 compatible = "arm,gic-v3-its";
51 socionext,synquacer-pre-its = <0x1000000 0x400000>;
52 msi-controller;
53 #msi-cells = <1>;
58 compatible = "ti,phy-am654-serdes";
60 reg-names = "serdes";
61 #phy-cells = <2>;
62 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
64 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
65 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
66 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
67 ti,serdes-clk = <&serdes0_clk>;
68 #clock-cells = <1>;
69 mux-controls = <&serdes_mux 0>;
73 compatible = "ti,phy-am654-serdes";
75 reg-names = "serdes";
76 #phy-cells = <2>;
77 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
79 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
80 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
81 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
82 ti,serdes-clk = <&serdes1_clk>;
83 #clock-cells = <1>;
84 mux-controls = <&serdes_mux 1>;
88 compatible = "ti,am654-uart";
91 clock-frequency = <48000000>;
92 current-speed = <115200>;
93 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
98 compatible = "ti,am654-uart";
101 clock-frequency = <48000000>;
102 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
107 compatible = "ti,am654-uart";
110 clock-frequency = <48000000>;
111 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
116 compatible = "ti,am654-sa2ul";
118 power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
119 #address-cells = <2>;
120 #size-cells = <2>;
125 dma-names = "tx", "rx1", "rx2";
128 compatible = "inside-secure,safexcel-eip76";
131 status = "disabled"; /* Used by OP-TEE */
137 compatible = "pinctrl-single";
139 #pinctrl-cells = <1>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x0000001ff>;
146 compatible = "pinctrl-single";
148 #pinctrl-cells = <1>;
149 pinctrl-single,register-width = <32>;
150 pinctrl-single,function-mask = <0x0000000f>;
154 compatible = "pinctrl-single";
156 #pinctrl-cells = <1>;
157 pinctrl-single,register-width = <32>;
158 pinctrl-single,function-mask = <0xffffffff>;
162 compatible = "pinctrl-single";
164 #pinctrl-cells = <1>;
165 pinctrl-single,register-width = <32>;
166 pinctrl-single,function-mask = <0xffffffff>;
170 compatible = "ti,am654-i2c", "ti,omap4-i2c";
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clock-names = "fck";
177 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
182 compatible = "ti,am654-i2c", "ti,omap4-i2c";
185 #address-cells = <1>;
186 #size-cells = <0>;
187 clock-names = "fck";
189 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
194 compatible = "ti,am654-i2c", "ti,omap4-i2c";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 clock-names = "fck";
201 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
206 compatible = "ti,am654-i2c", "ti,omap4-i2c";
209 #address-cells = <1>;
210 #size-cells = <0>;
211 clock-names = "fck";
213 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
218 compatible = "ti,am654-ecap", "ti,am3352-ecap";
219 #pwm-cells = <3>;
221 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
223 clock-names = "fck";
228 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
232 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
233 #address-cells = <1>;
234 #size-cells = <0>;
236 dma-names = "tx0", "rx0";
241 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
245 power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 assigned-clocks = <&k3_clks 137 1>;
249 assigned-clock-rates = <48000000>;
254 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
258 power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
259 #address-cells = <1>;
260 #size-cells = <0>;
265 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
269 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
270 #address-cells = <1>;
271 #size-cells = <0>;
276 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
280 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
281 #address-cells = <1>;
282 #size-cells = <0>;
287 compatible = "ti,am654-timer";
291 clock-names = "fck";
292 assigned-clocks = <&k3_clks 23 0>;
293 assigned-clock-parents = <&k3_clks 23 1>;
294 power-domains = <&k3_pds 23 TI_SCI_PD_EXCLUSIVE>;
295 ti,timer-pwm;
299 compatible = "ti,am654-timer";
303 clock-names = "fck";
304 assigned-clocks = <&k3_clks 24 0>;
305 assigned-clock-parents = <&k3_clks 24 1>;
306 power-domains = <&k3_pds 24 TI_SCI_PD_EXCLUSIVE>;
307 ti,timer-pwm;
311 compatible = "ti,am654-timer";
315 clock-names = "fck";
316 assigned-clocks = <&k3_clks 27 0>;
317 assigned-clock-parents = <&k3_clks 27 1>;
318 power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
319 ti,timer-pwm;
323 compatible = "ti,am654-timer";
327 clock-names = "fck";
328 assigned-clocks = <&k3_clks 28 0>;
329 assigned-clock-parents = <&k3_clks 28 1>;
330 power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
331 ti,timer-pwm;
335 compatible = "ti,am654-timer";
339 clock-names = "fck";
340 assigned-clocks = <&k3_clks 29 0>;
341 assigned-clock-parents = <&k3_clks 29 1>;
342 power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>;
343 ti,timer-pwm;
347 compatible = "ti,am654-timer";
351 clock-names = "fck";
352 assigned-clocks = <&k3_clks 30 0>;
353 assigned-clock-parents = <&k3_clks 30 1>;
354 power-domains = <&k3_pds 30 TI_SCI_PD_EXCLUSIVE>;
355 ti,timer-pwm;
359 compatible = "ti,am654-timer";
363 assigned-clocks = <&k3_clks 31 0>;
364 assigned-clock-parents = <&k3_clks 31 1>;
365 clock-names = "fck";
366 power-domains = <&k3_pds 31 TI_SCI_PD_EXCLUSIVE>;
367 ti,timer-pwm;
371 compatible = "ti,am654-timer";
375 clock-names = "fck";
376 assigned-clocks = <&k3_clks 32 0>;
377 assigned-clock-parents = <&k3_clks 32 1>;
378 power-domains = <&k3_pds 32 TI_SCI_PD_EXCLUSIVE>;
379 ti,timer-pwm;
383 compatible = "ti,am654-timer";
387 clock-names = "fck";
388 assigned-clocks = <&k3_clks 33 0>;
389 assigned-clock-parents = <&k3_clks 33 1>;
390 power-domains = <&k3_pds 33 TI_SCI_PD_EXCLUSIVE>;
391 ti,timer-pwm;
395 compatible = "ti,am654-timer";
399 clock-names = "fck";
400 assigned-clocks = <&k3_clks 34 0>;
401 assigned-clock-parents = <&k3_clks 34 1>;
402 power-domains = <&k3_pds 34 TI_SCI_PD_EXCLUSIVE>;
403 ti,timer-pwm;
407 compatible = "ti,am654-timer";
411 clock-names = "fck";
412 assigned-clocks = <&k3_clks 25 0>;
413 assigned-clock-parents = <&k3_clks 25 1>;
414 power-domains = <&k3_pds 25 TI_SCI_PD_EXCLUSIVE>;
415 ti,timer-pwm;
419 compatible = "ti,am654-timer";
423 clock-names = "fck";
424 assigned-clocks = <&k3_clks 26 0>;
425 assigned-clock-parents = <&k3_clks 26 1>;
426 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
427 ti,timer-pwm;
431 compatible = "ti,am654-sdhci-5.1";
433 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
435 clock-names = "clk_ahb", "clk_xin";
437 mmc-ddr-1_8v;
438 mmc-hs200-1_8v;
439 ti,otap-del-sel-legacy = <0x0>;
440 ti,otap-del-sel-mmc-hs = <0x0>;
441 ti,otap-del-sel-sd-hs = <0x0>;
442 ti,otap-del-sel-sdr12 = <0x0>;
443 ti,otap-del-sel-sdr25 = <0x0>;
444 ti,otap-del-sel-sdr50 = <0x8>;
445 ti,otap-del-sel-sdr104 = <0x7>;
446 ti,otap-del-sel-ddr50 = <0x5>;
447 ti,otap-del-sel-ddr52 = <0x5>;
448 ti,otap-del-sel-hs200 = <0x5>;
449 ti,otap-del-sel-hs400 = <0x0>;
450 ti,trm-icp = <0x8>;
451 dma-coherent;
455 compatible = "ti,am654-sdhci-5.1";
457 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
459 clock-names = "clk_ahb", "clk_xin";
461 ti,otap-del-sel-legacy = <0x0>;
462 ti,otap-del-sel-mmc-hs = <0x0>;
463 ti,otap-del-sel-sd-hs = <0x0>;
464 ti,otap-del-sel-sdr12 = <0x0>;
465 ti,otap-del-sel-sdr25 = <0x0>;
466 ti,otap-del-sel-sdr50 = <0x8>;
467 ti,otap-del-sel-sdr104 = <0x7>;
468 ti,otap-del-sel-ddr50 = <0x4>;
469 ti,otap-del-sel-ddr52 = <0x4>;
470 ti,otap-del-sel-hs200 = <0x7>;
471 ti,clkbuf-sel = <0x7>;
472 ti,trm-icp = <0x8>;
473 dma-coherent;
476 scm_conf: scm-conf@100000 {
477 compatible = "syscon", "simple-mfd";
479 #address-cells = <1>;
480 #size-cells = <1>;
493 serdes_mux: mux-controller {
494 compatible = "mmio-mux";
495 #mux-control-cells = <1>;
496 mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
500 dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
505 ehrpwm_tbclk: clock-controller@4140 {
506 compatible = "ti,am654-ehrpwm-tbclk";
508 #clock-cells = <1>;
513 compatible = "ti,am654-dwc3";
515 #address-cells = <1>;
516 #size-cells = <1>;
519 dma-coherent;
520 power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
522 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
523 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
532 interrupt-names = "peripheral",
535 maximum-speed = "high-speed";
538 phy-names = "usb2-phy";
544 compatible = "ti,am654-usb2", "ti,omap-usb2";
546 syscon-phy-power = <&scm_conf 0x4000>;
548 clock-names = "wkupclk", "refclk";
549 #phy-cells = <0>;
553 compatible = "ti,am654-dwc3";
555 #address-cells = <1>;
556 #size-cells = <1>;
559 dma-coherent;
560 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
562 assigned-clocks = <&k3_clks 152 2>;
563 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
571 interrupt-names = "peripheral",
574 maximum-speed = "high-speed";
577 phy-names = "usb2-phy";
582 compatible = "ti,am654-usb2", "ti,omap-usb2";
584 syscon-phy-power = <&scm_conf 0x4020>;
586 clock-names = "wkupclk", "refclk";
587 #phy-cells = <0>;
590 intr_main_gpio: interrupt-controller@a00000 {
591 compatible = "ti,sci-intr";
593 ti,intr-trigger-type = <1>;
594 interrupt-controller;
595 interrupt-parent = <&gic500>;
596 #interrupt-cells = <1>;
598 ti,sci-dev-id = <100>;
599 ti,interrupt-ranges = <0 392 32>;
603 compatible = "simple-mfd";
604 #address-cells = <2>;
605 #size-cells = <2>;
607 dma-coherent;
608 dma-ranges;
610 ti,sci-dev-id = <118>;
612 intr_main_navss: interrupt-controller@310e0000 {
613 compatible = "ti,sci-intr";
615 ti,intr-trigger-type = <4>;
616 interrupt-controller;
617 interrupt-parent = <&gic500>;
618 #interrupt-cells = <1>;
620 ti,sci-dev-id = <182>;
621 ti,interrupt-ranges = <0 64 64>,
625 inta_main_udmass: interrupt-controller@33d00000 {
626 compatible = "ti,sci-inta";
628 interrupt-controller;
629 interrupt-parent = <&intr_main_navss>;
630 msi-controller;
631 #interrupt-cells = <0>;
633 ti,sci-dev-id = <179>;
634 ti,interrupt-ranges = <0 0 256>;
638 compatible = "ti,am654-secure-proxy";
639 #mbox-cells = <1>;
640 reg-names = "target_data", "rt", "scfg";
644 interrupt-names = "rx_011";
649 compatible = "ti,am654-hwspinlock";
651 #hwlock-cells = <1>;
655 compatible = "ti,am654-mailbox";
657 #mbox-cells = <1>;
658 ti,mbox-num-users = <4>;
659 ti,mbox-num-fifos = <16>;
660 interrupt-parent = <&intr_main_navss>;
665 compatible = "ti,am654-mailbox";
667 #mbox-cells = <1>;
668 ti,mbox-num-users = <4>;
669 ti,mbox-num-fifos = <16>;
670 interrupt-parent = <&intr_main_navss>;
675 compatible = "ti,am654-mailbox";
677 #mbox-cells = <1>;
678 ti,mbox-num-users = <4>;
679 ti,mbox-num-fifos = <16>;
680 interrupt-parent = <&intr_main_navss>;
685 compatible = "ti,am654-mailbox";
687 #mbox-cells = <1>;
688 ti,mbox-num-users = <4>;
689 ti,mbox-num-fifos = <16>;
690 interrupt-parent = <&intr_main_navss>;
695 compatible = "ti,am654-mailbox";
697 #mbox-cells = <1>;
698 ti,mbox-num-users = <4>;
699 ti,mbox-num-fifos = <16>;
700 interrupt-parent = <&intr_main_navss>;
705 compatible = "ti,am654-mailbox";
707 #mbox-cells = <1>;
708 ti,mbox-num-users = <4>;
709 ti,mbox-num-fifos = <16>;
710 interrupt-parent = <&intr_main_navss>;
715 compatible = "ti,am654-mailbox";
717 #mbox-cells = <1>;
718 ti,mbox-num-users = <4>;
719 ti,mbox-num-fifos = <16>;
720 interrupt-parent = <&intr_main_navss>;
725 compatible = "ti,am654-mailbox";
727 #mbox-cells = <1>;
728 ti,mbox-num-users = <4>;
729 ti,mbox-num-fifos = <16>;
730 interrupt-parent = <&intr_main_navss>;
735 compatible = "ti,am654-mailbox";
737 #mbox-cells = <1>;
738 ti,mbox-num-users = <4>;
739 ti,mbox-num-fifos = <16>;
740 interrupt-parent = <&intr_main_navss>;
745 compatible = "ti,am654-mailbox";
747 #mbox-cells = <1>;
748 ti,mbox-num-users = <4>;
749 ti,mbox-num-fifos = <16>;
750 interrupt-parent = <&intr_main_navss>;
755 compatible = "ti,am654-mailbox";
757 #mbox-cells = <1>;
758 ti,mbox-num-users = <4>;
759 ti,mbox-num-fifos = <16>;
760 interrupt-parent = <&intr_main_navss>;
765 compatible = "ti,am654-mailbox";
767 #mbox-cells = <1>;
768 ti,mbox-num-users = <4>;
769 ti,mbox-num-fifos = <16>;
770 interrupt-parent = <&intr_main_navss>;
775 compatible = "ti,am654-navss-ringacc";
781 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
782 ti,num-rings = <818>;
783 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
785 ti,sci-dev-id = <187>;
786 msi-parent = <&inta_main_udmass>;
789 main_udmap: dma-controller@31150000 {
790 compatible = "ti,am654-navss-main-udmap";
794 reg-names = "gcfg", "rchanrt", "tchanrt";
795 msi-parent = <&inta_main_udmass>;
796 #dma-cells = <1>;
799 ti,sci-dev-id = <188>;
802 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
804 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
806 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
810 compatible = "ti,am65-cpts";
812 reg-names = "cpts";
814 clock-names = "cpts";
815 interrupts-extended = <&intr_main_navss 391>;
816 interrupt-names = "cpts";
817 ti,cpts-periodic-outputs = <6>;
818 ti,cpts-ext-ts-inputs = <8>;
820 main_cpts_mux: refclk-mux {
821 #clock-cells = <0>;
826 assigned-clocks = <&main_cpts_mux>;
827 assigned-clock-parents = <&k3_clks 118 5>;
833 compatible = "ti,am654-gpio", "ti,keystone-gpio";
835 gpio-controller;
836 #gpio-cells = <2>;
837 interrupt-parent = <&intr_main_gpio>;
839 interrupt-controller;
840 #interrupt-cells = <2>;
842 ti,davinci-gpio-unbanked = <0>;
844 clock-names = "gpio";
848 compatible = "ti,am654-gpio", "ti,keystone-gpio";
850 gpio-controller;
851 #gpio-cells = <2>;
852 interrupt-parent = <&intr_main_gpio>;
854 interrupt-controller;
855 #interrupt-cells = <2>;
857 ti,davinci-gpio-unbanked = <0>;
859 clock-names = "gpio";
863 compatible = "ti,am654-pcie-rc";
865 reg-names = "app", "dbics", "config", "atu";
866 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
867 #address-cells = <3>;
868 #size-cells = <2>;
871 ti,syscon-pcie-id = <&scm_conf 0x210>;
872 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
873 bus-range = <0x0 0xff>;
874 num-viewport = <16>;
875 max-link-speed = <2>;
876 dma-coherent;
878 msi-map = <0x0 &gic_its 0x0 0x10000>;
883 pcie0_ep: pcie-ep@5500000 {
884 compatible = "ti,am654-pcie-ep";
886 reg-names = "app", "dbics", "addr_space", "atu";
887 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
888 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
889 num-ib-windows = <16>;
890 num-ob-windows = <16>;
891 max-link-speed = <2>;
892 dma-coherent;
898 compatible = "ti,am654-pcie-rc";
900 reg-names = "app", "dbics", "config", "atu";
901 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
902 #address-cells = <3>;
903 #size-cells = <2>;
906 ti,syscon-pcie-id = <&scm_conf 0x210>;
907 ti,syscon-pcie-mode = <&scm_conf 0x4070>;
908 bus-range = <0x0 0xff>;
909 num-viewport = <16>;
910 max-link-speed = <2>;
911 dma-coherent;
913 msi-map = <0x0 &gic_its 0x10000 0x10000>;
918 pcie1_ep: pcie-ep@5600000 {
919 compatible = "ti,am654-pcie-ep";
921 reg-names = "app", "dbics", "addr_space", "atu";
922 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
923 ti,syscon-pcie-mode = <&scm_conf 0x4070>;
924 num-ib-windows = <16>;
925 num-ob-windows = <16>;
926 max-link-speed = <2>;
927 dma-coherent;
933 compatible = "ti,am33xx-mcasp-audio";
936 reg-names = "mpu","dat";
939 interrupt-names = "tx", "rx";
942 dma-names = "tx", "rx";
945 clock-names = "fck";
946 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
951 compatible = "ti,am33xx-mcasp-audio";
954 reg-names = "mpu","dat";
957 interrupt-names = "tx", "rx";
960 dma-names = "tx", "rx";
963 clock-names = "fck";
964 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
969 compatible = "ti,am33xx-mcasp-audio";
972 reg-names = "mpu","dat";
975 interrupt-names = "tx", "rx";
978 dma-names = "tx", "rx";
981 clock-names = "fck";
982 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
987 compatible = "ti,am654-cal";
990 reg-names = "cal_top",
993 ti,camerrx-control = <&scm_conf 0x40c0>;
994 clock-names = "fck";
996 power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
999 #address-cells = <1>;
1000 #size-cells = <0>;
1009 compatible = "ti,am65x-dss";
1018 reg-names = "common", "vidl1", "vid",
1021 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
1023 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
1028 clock-names = "fck", "vp1", "vp2";
1032 * DIV1. See "Figure 12-3365. DSS Integration"
1035 assigned-clocks = <&k3_clks 67 2>;
1036 assigned-clock-parents = <&k3_clks 67 5>;
1040 dma-coherent;
1043 #address-cells = <1>;
1044 #size-cells = <0>;
1049 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1050 #pwm-cells = <3>;
1052 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
1054 clock-names = "tbclk", "fck";
1059 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1060 #pwm-cells = <3>;
1062 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
1064 clock-names = "tbclk", "fck";
1069 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1070 #pwm-cells = <3>;
1072 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
1074 clock-names = "tbclk", "fck";
1079 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1080 #pwm-cells = <3>;
1082 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
1084 clock-names = "tbclk", "fck";
1089 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1090 #pwm-cells = <3>;
1092 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
1094 clock-names = "tbclk", "fck";
1099 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
1100 #pwm-cells = <3>;
1102 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
1104 clock-names = "tbclk", "fck";
1109 compatible = "ti,am654-icssg";
1111 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
1112 #address-cells = <1>;
1113 #size-cells = <1>;
1120 reg-names = "dram0", "dram1",
1125 compatible = "ti,pruss-cfg", "syscon";
1127 #address-cells = <1>;
1128 #size-cells = <1>;
1132 #address-cells = <1>;
1133 #size-cells = <0>;
1135 icssg0_coreclk_mux: coreclk-mux@3c {
1137 #clock-cells = <0>;
1140 assigned-clocks = <&icssg0_coreclk_mux>;
1141 assigned-clock-parents = <&k3_clks 62 3>;
1144 icssg0_iepclk_mux: iepclk-mux@30 {
1146 #clock-cells = <0>;
1149 assigned-clocks = <&icssg0_iepclk_mux>;
1150 assigned-clock-parents = <&icssg0_coreclk_mux>;
1155 icssg0_mii_rt: mii-rt@32000 {
1156 compatible = "ti,pruss-mii", "syscon";
1160 icssg0_mii_g_rt: mii-g-rt@33000 {
1161 compatible = "ti,pruss-mii-g", "syscon";
1165 icssg0_intc: interrupt-controller@20000 {
1166 compatible = "ti,icssg-intc";
1168 interrupt-controller;
1169 #interrupt-cells = <3>;
1178 interrupt-names = "host_intr0", "host_intr1",
1185 compatible = "ti,am654-pru";
1189 reg-names = "iram", "control", "debug";
1190 firmware-name = "am65x-pru0_0-fw";
1194 compatible = "ti,am654-rtu";
1198 reg-names = "iram", "control", "debug";
1199 firmware-name = "am65x-rtu0_0-fw";
1203 compatible = "ti,am654-tx-pru";
1207 reg-names = "iram", "control", "debug";
1208 firmware-name = "am65x-txpru0_0-fw";
1212 compatible = "ti,am654-pru";
1216 reg-names = "iram", "control", "debug";
1217 firmware-name = "am65x-pru0_1-fw";
1221 compatible = "ti,am654-rtu";
1225 reg-names = "iram", "control", "debug";
1226 firmware-name = "am65x-rtu0_1-fw";
1230 compatible = "ti,am654-tx-pru";
1234 reg-names = "iram", "control", "debug";
1235 firmware-name = "am65x-txpru0_1-fw";
1242 clock-names = "fck";
1243 #address-cells = <1>;
1244 #size-cells = <0>;
1251 compatible = "ti,am654-icssg";
1253 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
1254 #address-cells = <1>;
1255 #size-cells = <1>;
1262 reg-names = "dram0", "dram1",
1267 compatible = "ti,pruss-cfg", "syscon";
1269 #address-cells = <1>;
1270 #size-cells = <1>;
1274 #address-cells = <1>;
1275 #size-cells = <0>;
1277 icssg1_coreclk_mux: coreclk-mux@3c {
1279 #clock-cells = <0>;
1282 assigned-clocks = <&icssg1_coreclk_mux>;
1283 assigned-clock-parents = <&k3_clks 63 3>;
1286 icssg1_iepclk_mux: iepclk-mux@30 {
1288 #clock-cells = <0>;
1291 assigned-clocks = <&icssg1_iepclk_mux>;
1292 assigned-clock-parents = <&icssg1_coreclk_mux>;
1297 icssg1_mii_rt: mii-rt@32000 {
1298 compatible = "ti,pruss-mii", "syscon";
1302 icssg1_mii_g_rt: mii-g-rt@33000 {
1303 compatible = "ti,pruss-mii-g", "syscon";
1307 icssg1_intc: interrupt-controller@20000 {
1308 compatible = "ti,icssg-intc";
1310 interrupt-controller;
1311 #interrupt-cells = <3>;
1320 interrupt-names = "host_intr0", "host_intr1",
1327 compatible = "ti,am654-pru";
1331 reg-names = "iram", "control", "debug";
1332 firmware-name = "am65x-pru1_0-fw";
1336 compatible = "ti,am654-rtu";
1340 reg-names = "iram", "control", "debug";
1341 firmware-name = "am65x-rtu1_0-fw";
1345 compatible = "ti,am654-tx-pru";
1349 reg-names = "iram", "control", "debug";
1350 firmware-name = "am65x-txpru1_0-fw";
1354 compatible = "ti,am654-pru";
1358 reg-names = "iram", "control", "debug";
1359 firmware-name = "am65x-pru1_1-fw";
1363 compatible = "ti,am654-rtu";
1367 reg-names = "iram", "control", "debug";
1368 firmware-name = "am65x-rtu1_1-fw";
1372 compatible = "ti,am654-tx-pru";
1376 reg-names = "iram", "control", "debug";
1377 firmware-name = "am65x-txpru1_1-fw";
1384 clock-names = "fck";
1385 #address-cells = <1>;
1386 #size-cells = <0>;
1393 compatible = "ti,am654-icssg";
1395 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1396 #address-cells = <1>;
1397 #size-cells = <1>;
1404 reg-names = "dram0", "dram1",
1409 compatible = "ti,pruss-cfg", "syscon";
1411 #address-cells = <1>;
1412 #size-cells = <1>;
1416 #address-cells = <1>;
1417 #size-cells = <0>;
1419 icssg2_coreclk_mux: coreclk-mux@3c {
1421 #clock-cells = <0>;
1424 assigned-clocks = <&icssg2_coreclk_mux>;
1425 assigned-clock-parents = <&k3_clks 64 3>;
1428 icssg2_iepclk_mux: iepclk-mux@30 {
1430 #clock-cells = <0>;
1433 assigned-clocks = <&icssg2_iepclk_mux>;
1434 assigned-clock-parents = <&icssg2_coreclk_mux>;
1439 icssg2_mii_rt: mii-rt@32000 {
1440 compatible = "ti,pruss-mii", "syscon";
1444 icssg2_mii_g_rt: mii-g-rt@33000 {
1445 compatible = "ti,pruss-mii-g", "syscon";
1449 icssg2_intc: interrupt-controller@20000 {
1450 compatible = "ti,icssg-intc";
1452 interrupt-controller;
1453 #interrupt-cells = <3>;
1462 interrupt-names = "host_intr0", "host_intr1",
1469 compatible = "ti,am654-pru";
1473 reg-names = "iram", "control", "debug";
1474 firmware-name = "am65x-pru2_0-fw";
1478 compatible = "ti,am654-rtu";
1482 reg-names = "iram", "control", "debug";
1483 firmware-name = "am65x-rtu2_0-fw";
1487 compatible = "ti,am654-tx-pru";
1491 reg-names = "iram", "control", "debug";
1492 firmware-name = "am65x-txpru2_0-fw";
1496 compatible = "ti,am654-pru";
1500 reg-names = "iram", "control", "debug";
1501 firmware-name = "am65x-pru2_1-fw";
1505 compatible = "ti,am654-rtu";
1509 reg-names = "iram", "control", "debug";
1510 firmware-name = "am65x-rtu2_1-fw";
1514 compatible = "ti,am654-tx-pru";
1518 reg-names = "iram", "control", "debug";
1519 firmware-name = "am65x-txpru2_1-fw";
1526 clock-names = "fck";
1527 #address-cells = <1>;
1528 #size-cells = <0>;