dts/ti/k3-am62-mcu.dtsi

1 // SPDX-License-Identifier: GPL-2.0
5  * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 		compatible = "pinctrl-single";
12 		#pinctrl-cells = <1>;
13 		pinctrl-single,register-width = <32>;
14 		pinctrl-single,function-mask = <0xffffffff>;
18 		compatible = "ti,j721e-esm";
20 		ti,esm-pins = <0>, <1>, <2>, <85>;
29 		compatible = "ti,am654-timer";
32 		clock-names = "fck";
33 		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
34 		ti,timer-pwm;
39 		compatible = "ti,am654-timer";
42 		clock-names = "fck";
43 		power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
44 		ti,timer-pwm;
49 		compatible = "ti,am654-timer";
52 		clock-names = "fck";
53 		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
54 		ti,timer-pwm;
59 		compatible = "ti,am654-timer";
62 		clock-names = "fck";
63 		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
64 		ti,timer-pwm;
69 		compatible = "ti,am64-uart", "ti,am654-uart";
72 		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
74 		clock-names = "fclk";
79 		compatible = "ti,am64-i2c", "ti,omap4-i2c";
82 		#address-cells = <1>;
83 		#size-cells = <0>;
84 		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
86 		clock-names = "fck";
91 		compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
94 		#address-cells = <1>;
95 		#size-cells = <0>;
96 		power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
102 		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
105 		#address-cells = <1>;
106 		#size-cells = <0>;
107 		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
112 	mcu_gpio_intr: interrupt-controller@4210000 {
113 		compatible = "ti,sci-intr";
115 		ti,intr-trigger-type = <1>;
116 		interrupt-controller;
117 		interrupt-parent = <&gic500>;
118 		#interrupt-cells = <1>;
120 		ti,sci-dev-id = <5>;
121 		ti,interrupt-ranges = <0 104 4>;
124 	mcu_gpio0: gpio@4201000 {
125 		compatible = "ti,am64-gpio", "ti,keystone-gpio";
127 		gpio-controller;
128 		#gpio-cells = <2>;
129 		interrupt-parent = <&mcu_gpio_intr>;
131 		interrupt-controller;
132 		#interrupt-cells = <2>;
134 		ti,davinci-gpio-unbanked = <0>;
135 		power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
137 		clock-names = "gpio";
141 		compatible = "ti,j7-rti-wdt";
144 		power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
145 		assigned-clocks = <&k3_clks 131 0>;
146 		assigned-clock-parents = <&k3_clks 131 2>;
155 		reg-names = "m_can", "message_ram";
156 		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
158 		clock-names = "hclk", "cclk";
159 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
167 		reg-names = "m_can", "message_ram";
168 		power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
170 		clock-names = "hclk", "cclk";
171 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;