Lines Matching +full:assigned +full:- +full:clocks +full:- +full:parents
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
23 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "syscon", "simple-mfd";
48 #address-cells = <1>;
49 #size-cells = <1>;
53 compatible = "ti,am654-phy-gmii-sel";
55 #phy-cells = <1>;
58 epwm_tbclk: clock-controller@4130 {
59 compatible = "ti,am62-epwm-tbclk";
61 #clock-cells = <1>;
64 audio_refclk0: clock-controller@82e0 {
65 compatible = "ti,am62-audio-refclk";
67 clocks = <&k3_clks 157 0>;
68 assigned-clocks = <&k3_clks 157 0>;
69 assigned-clock-parents = <&k3_clks 157 8>;
70 #clock-cells = <0>;
73 audio_refclk1: clock-controller@82e4 {
74 compatible = "ti,am62-audio-refclk";
76 clocks = <&k3_clks 157 10>;
77 assigned-clocks = <&k3_clks 157 10>;
78 assigned-clock-parents = <&k3_clks 157 18>;
79 #clock-cells = <0>;
84 compatible = "simple-mfd";
85 #address-cells = <2>;
86 #size-cells = <2>;
87 dma-ranges;
90 ti,sci-dev-id = <25>;
93 compatible = "ti,am654-secure-proxy";
94 #mbox-cells = <1>;
95 reg-names = "target_data", "rt", "scfg";
99 interrupt-names = "rx_012";
103 inta_main_dmss: interrupt-controller@48000000 {
104 compatible = "ti,sci-inta";
106 #interrupt-cells = <0>;
107 interrupt-controller;
108 interrupt-parent = <&gic500>;
109 msi-controller;
111 ti,sci-dev-id = <28>;
112 ti,interrupt-ranges = <4 68 36>;
113 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
116 main_bcdma: dma-controller@485c0100 {
117 compatible = "ti,am64-dmss-bcdma";
123 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
124 msi-parent = <&inta_main_dmss>;
125 #dma-cells = <3>;
128 ti,sci-dev-id = <26>;
129 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
130 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
131 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
134 main_pktdma: dma-controller@485c0000 {
135 compatible = "ti,am64-dmss-pktdma";
140 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
141 msi-parent = <&inta_main_dmss>;
142 #dma-cells = <2>;
145 ti,sci-dev-id = <30>;
146 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
150 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
154 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
160 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
167 dmsc: system-controller@44043000 {
168 compatible = "ti,k2g-sci";
169 ti,host-id = <12>;
170 mbox-names = "rx", "tx";
173 reg-names = "debug_messages";
176 k3_pds: power-controller {
177 compatible = "ti,sci-pm-domain";
178 #power-domain-cells = <2>;
181 k3_clks: clock-controller {
182 compatible = "ti,k2g-sci-clk";
183 #clock-cells = <2>;
186 k3_reset: reset-controller {
187 compatible = "ti,sci-reset";
188 #reset-cells = <2>;
193 compatible = "ti,am62-sa3ul";
195 #address-cells = <2>;
196 #size-cells = <2>;
201 dma-names = "tx", "rx1", "rx2";
205 compatible = "ti,am654-secure-proxy";
206 #mbox-cells = <1>;
207 reg-names = "target_data", "rt", "scfg";
214 * firmware on non-MPU processors
220 compatible = "pinctrl-single";
222 #pinctrl-cells = <1>;
223 pinctrl-single,register-width = <32>;
224 pinctrl-single,function-mask = <0xffffffff>;
228 compatible = "ti,j721e-esm";
230 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
234 compatible = "ti,am654-timer";
237 clocks = <&k3_clks 36 2>;
238 clock-names = "fck";
239 assigned-clocks = <&k3_clks 36 2>;
240 assigned-clock-parents = <&k3_clks 36 3>;
241 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
242 ti,timer-pwm;
246 compatible = "ti,am654-timer";
249 clocks = <&k3_clks 37 2>;
250 clock-names = "fck";
251 assigned-clocks = <&k3_clks 37 2>;
252 assigned-clock-parents = <&k3_clks 37 3>;
253 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
254 ti,timer-pwm;
258 compatible = "ti,am654-timer";
261 clocks = <&k3_clks 38 2>;
262 clock-names = "fck";
263 assigned-clocks = <&k3_clks 38 2>;
264 assigned-clock-parents = <&k3_clks 38 3>;
265 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
266 ti,timer-pwm;
270 compatible = "ti,am654-timer";
273 clocks = <&k3_clks 39 2>;
274 clock-names = "fck";
275 assigned-clocks = <&k3_clks 39 2>;
276 assigned-clock-parents = <&k3_clks 39 3>;
277 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
278 ti,timer-pwm;
282 compatible = "ti,am654-timer";
285 clocks = <&k3_clks 40 2>;
286 clock-names = "fck";
287 assigned-clocks = <&k3_clks 40 2>;
288 assigned-clock-parents = <&k3_clks 40 3>;
289 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
290 ti,timer-pwm;
294 compatible = "ti,am654-timer";
297 clocks = <&k3_clks 41 2>;
298 clock-names = "fck";
299 assigned-clocks = <&k3_clks 41 2>;
300 assigned-clock-parents = <&k3_clks 41 3>;
301 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
302 ti,timer-pwm;
306 compatible = "ti,am654-timer";
309 clocks = <&k3_clks 42 2>;
310 clock-names = "fck";
311 assigned-clocks = <&k3_clks 42 2>;
312 assigned-clock-parents = <&k3_clks 42 3>;
313 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
314 ti,timer-pwm;
318 compatible = "ti,am654-timer";
321 clocks = <&k3_clks 43 2>;
322 clock-names = "fck";
323 assigned-clocks = <&k3_clks 43 2>;
324 assigned-clock-parents = <&k3_clks 43 3>;
325 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
326 ti,timer-pwm;
330 compatible = "ti,am64-uart", "ti,am654-uart";
333 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
334 clocks = <&k3_clks 146 0>;
335 clock-names = "fclk";
340 compatible = "ti,am64-uart", "ti,am654-uart";
343 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
344 clocks = <&k3_clks 152 0>;
345 clock-names = "fclk";
350 compatible = "ti,am64-uart", "ti,am654-uart";
353 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
354 clocks = <&k3_clks 153 0>;
355 clock-names = "fclk";
360 compatible = "ti,am64-uart", "ti,am654-uart";
363 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
364 clocks = <&k3_clks 154 0>;
365 clock-names = "fclk";
370 compatible = "ti,am64-uart", "ti,am654-uart";
373 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
374 clocks = <&k3_clks 155 0>;
375 clock-names = "fclk";
380 compatible = "ti,am64-uart", "ti,am654-uart";
383 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
384 clocks = <&k3_clks 156 0>;
385 clock-names = "fclk";
390 compatible = "ti,am64-uart", "ti,am654-uart";
393 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
394 clocks = <&k3_clks 158 0>;
395 clock-names = "fclk";
400 compatible = "ti,am64-i2c", "ti,omap4-i2c";
403 #address-cells = <1>;
404 #size-cells = <0>;
405 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
406 clocks = <&k3_clks 102 2>;
407 clock-names = "fck";
412 compatible = "ti,am64-i2c", "ti,omap4-i2c";
415 #address-cells = <1>;
416 #size-cells = <0>;
417 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
418 clocks = <&k3_clks 103 2>;
419 clock-names = "fck";
424 compatible = "ti,am64-i2c", "ti,omap4-i2c";
427 #address-cells = <1>;
428 #size-cells = <0>;
429 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
430 clocks = <&k3_clks 104 2>;
431 clock-names = "fck";
436 compatible = "ti,am64-i2c", "ti,omap4-i2c";
439 #address-cells = <1>;
440 #size-cells = <0>;
441 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
442 clocks = <&k3_clks 105 2>;
443 clock-names = "fck";
448 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
451 #address-cells = <1>;
452 #size-cells = <0>;
453 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
454 clocks = <&k3_clks 141 0>;
459 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
462 #address-cells = <1>;
463 #size-cells = <0>;
464 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
465 clocks = <&k3_clks 142 0>;
470 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
473 #address-cells = <1>;
474 #size-cells = <0>;
475 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
476 clocks = <&k3_clks 143 0>;
480 main_gpio_intr: interrupt-controller@a00000 {
481 compatible = "ti,sci-intr";
483 ti,intr-trigger-type = <1>;
484 interrupt-controller;
485 interrupt-parent = <&gic500>;
486 #interrupt-cells = <1>;
488 ti,sci-dev-id = <3>;
489 ti,interrupt-ranges = <0 32 16>;
493 compatible = "ti,am64-gpio", "ti,keystone-gpio";
495 gpio-controller;
496 #gpio-cells = <2>;
497 interrupt-parent = <&main_gpio_intr>;
500 interrupt-controller;
501 #interrupt-cells = <2>;
503 ti,davinci-gpio-unbanked = <0>;
504 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
505 clocks = <&k3_clks 77 0>;
506 clock-names = "gpio";
510 compatible = "ti,am64-gpio", "ti,keystone-gpio";
512 gpio-controller;
513 #gpio-cells = <2>;
514 interrupt-parent = <&main_gpio_intr>;
517 interrupt-controller;
518 #interrupt-cells = <2>;
520 ti,davinci-gpio-unbanked = <0>;
521 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
522 clocks = <&k3_clks 78 0>;
523 clock-names = "gpio";
527 compatible = "ti,am62-sdhci";
530 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
531 clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
532 clock-names = "clk_ahb", "clk_xin";
533 assigned-clocks = <&k3_clks 57 6>;
534 assigned-clock-parents = <&k3_clks 57 8>;
535 mmc-ddr-1_8v;
536 mmc-hs200-1_8v;
537 ti,trm-icp = <0x2>;
538 bus-width = <8>;
539 ti,clkbuf-sel = <0x7>;
540 ti,otap-del-sel-legacy = <0x0>;
541 ti,otap-del-sel-mmc-hs = <0x0>;
542 ti,otap-del-sel-ddr52 = <0x5>;
543 ti,otap-del-sel-hs200 = <0x5>;
544 ti,itap-del-sel-legacy = <0xa>;
545 ti,itap-del-sel-mmc-hs = <0x1>;
550 compatible = "ti,am62-sdhci";
553 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
554 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
555 clock-names = "clk_ahb", "clk_xin";
556 ti,trm-icp = <0x2>;
557 ti,otap-del-sel-legacy = <0x8>;
558 ti,otap-del-sel-sd-hs = <0x0>;
559 ti,otap-del-sel-sdr12 = <0x0>;
560 ti,otap-del-sel-sdr25 = <0x0>;
561 ti,otap-del-sel-sdr50 = <0x8>;
562 ti,otap-del-sel-sdr104 = <0x7>;
563 ti,otap-del-sel-ddr50 = <0x4>;
564 ti,itap-del-sel-legacy = <0xa>;
565 ti,itap-del-sel-sd-hs = <0x1>;
566 ti,itap-del-sel-sdr12 = <0xa>;
567 ti,itap-del-sel-sdr25 = <0x1>;
568 ti,clkbuf-sel = <0x7>;
569 bus-width = <4>;
574 compatible = "ti,am62-sdhci";
577 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
578 clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
579 clock-names = "clk_ahb", "clk_xin";
580 ti,trm-icp = <0x2>;
581 ti,otap-del-sel-legacy = <0x8>;
582 ti,otap-del-sel-sd-hs = <0x0>;
583 ti,otap-del-sel-sdr12 = <0x0>;
584 ti,otap-del-sel-sdr25 = <0x0>;
585 ti,otap-del-sel-sdr50 = <0x8>;
586 ti,otap-del-sel-sdr104 = <0x7>;
587 ti,otap-del-sel-ddr50 = <0x8>;
588 ti,itap-del-sel-legacy = <0xa>;
589 ti,itap-del-sel-sd-hs = <0xa>;
590 ti,itap-del-sel-sdr12 = <0xa>;
591 ti,itap-del-sel-sdr25 = <0x1>;
592 ti,clkbuf-sel = <0x7>;
596 usbss0: dwc3-usb@f900000 {
597 compatible = "ti,am62-usb";
599 clocks = <&k3_clks 161 3>;
600 clock-names = "ref";
601 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
602 #address-cells = <2>;
603 #size-cells = <2>;
604 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
613 interrupt-names = "host", "peripheral";
614 maximum-speed = "high-speed";
616 snps,usb2-gadget-lpm-disable;
617 snps,usb2-lpm-disable;
621 usbss1: dwc3-usb@f910000 {
622 compatible = "ti,am62-usb";
624 clocks = <&k3_clks 162 3>;
625 clock-names = "ref";
626 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
627 #address-cells = <2>;
628 #size-cells = <2>;
629 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
638 interrupt-names = "host", "peripheral";
639 maximum-speed = "high-speed";
641 snps,usb2-gadget-lpm-disable;
642 snps,usb2-lpm-disable;
647 compatible = "simple-bus";
649 #address-cells = <2>;
650 #size-cells = <2>;
654 compatible = "ti,am654-ospi", "cdns,qspi-nor";
658 cdns,fifo-depth = <256>;
659 cdns,fifo-width = <4>;
660 cdns,trigger-address = <0x0>;
661 clocks = <&k3_clks 75 7>;
662 assigned-clocks = <&k3_clks 75 7>;
663 assigned-clock-parents = <&k3_clks 75 8>;
664 assigned-clock-rates = <166666666>;
665 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
666 #address-cells = <1>;
667 #size-cells = <0>;
673 compatible = "ti,am642-cpsw-nuss";
674 #address-cells = <2>;
675 #size-cells = <2>;
677 reg-names = "cpsw_nuss";
679 clocks = <&k3_clks 13 0>;
680 assigned-clocks = <&k3_clks 13 3>;
681 assigned-clock-parents = <&k3_clks 13 11>;
682 clock-names = "fck";
683 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
694 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
697 ethernet-ports {
698 #address-cells = <1>;
699 #size-cells = <0>;
703 ti,mac-only;
706 mac-address = [00 00 00 00 00 00];
707 ti,syscon-efuse = <&wkup_conf 0x200>;
712 ti,mac-only;
715 mac-address = [00 00 00 00 00 00];
720 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
722 #address-cells = <1>;
723 #size-cells = <0>;
724 clocks = <&k3_clks 13 0>;
725 clock-names = "fck";
731 compatible = "ti,j721e-cpts";
733 clocks = <&k3_clks 13 3>;
734 clock-names = "cpts";
735 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
736 interrupt-names = "cpts";
737 ti,cpts-ext-ts-inputs = <4>;
738 ti,cpts-periodic-outputs = <2>;
743 compatible = "ti,am625-dss";
752 reg-names = "common", "vidl1", "vid",
754 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
755 clocks = <&k3_clks 186 6>,
758 clock-names = "fck", "vp1", "vp2";
763 #address-cells = <1>;
764 #size-cells = <0>;
769 compatible = "ti,am64-hwspinlock";
771 #hwlock-cells = <1>;
775 compatible = "ti,am64-mailbox";
779 #mbox-cells = <1>;
780 ti,mbox-num-users = <4>;
781 ti,mbox-num-fifos = <16>;
785 compatible = "ti,am3352-ecap";
786 #pwm-cells = <3>;
788 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
789 clocks = <&k3_clks 51 0>;
790 clock-names = "fck";
795 compatible = "ti,am3352-ecap";
796 #pwm-cells = <3>;
798 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
799 clocks = <&k3_clks 52 0>;
800 clock-names = "fck";
805 compatible = "ti,am3352-ecap";
806 #pwm-cells = <3>;
808 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
809 clocks = <&k3_clks 53 0>;
810 clock-names = "fck";
818 reg-names = "m_can", "message_ram";
819 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
820 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
821 clock-names = "hclk", "cclk";
824 interrupt-names = "int0", "int1";
825 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
830 compatible = "ti,j7-rti-wdt";
832 clocks = <&k3_clks 125 0>;
833 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
834 assigned-clocks = <&k3_clks 125 0>;
835 assigned-clock-parents = <&k3_clks 125 2>;
839 compatible = "ti,j7-rti-wdt";
841 clocks = <&k3_clks 126 0>;
842 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
843 assigned-clocks = <&k3_clks 126 0>;
844 assigned-clock-parents = <&k3_clks 126 2>;
848 compatible = "ti,j7-rti-wdt";
850 clocks = <&k3_clks 127 0>;
851 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
852 assigned-clocks = <&k3_clks 127 0>;
853 assigned-clock-parents = <&k3_clks 127 2>;
857 compatible = "ti,j7-rti-wdt";
859 clocks = <&k3_clks 128 0>;
860 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
861 assigned-clocks = <&k3_clks 128 0>;
862 assigned-clock-parents = <&k3_clks 128 2>;
866 compatible = "ti,j7-rti-wdt";
868 clocks = <&k3_clks 130 0>;
869 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
870 assigned-clocks = <&k3_clks 130 0>;
871 assigned-clock-parents = <&k3_clks 130 2>;
875 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
876 #pwm-cells = <3>;
878 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
879 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
880 clock-names = "tbclk", "fck";
885 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
886 #pwm-cells = <3>;
888 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
889 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
890 clock-names = "tbclk", "fck";
895 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
896 #pwm-cells = <3>;
898 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
899 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
900 clock-names = "tbclk", "fck";
904 mcasp0: audio-controller@2b00000 {
905 compatible = "ti,am33xx-mcasp-audio";
908 reg-names = "mpu", "dat";
911 interrupt-names = "tx", "rx";
914 dma-names = "tx", "rx";
916 clocks = <&k3_clks 190 0>;
917 clock-names = "fck";
918 assigned-clocks = <&k3_clks 190 0>;
919 assigned-clock-parents = <&k3_clks 190 2>;
920 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
924 mcasp1: audio-controller@2b10000 {
925 compatible = "ti,am33xx-mcasp-audio";
928 reg-names = "mpu", "dat";
931 interrupt-names = "tx", "rx";
934 dma-names = "tx", "rx";
936 clocks = <&k3_clks 191 0>;
937 clock-names = "fck";
938 assigned-clocks = <&k3_clks 191 0>;
939 assigned-clock-parents = <&k3_clks 191 2>;
940 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
944 mcasp2: audio-controller@2b20000 {
945 compatible = "ti,am33xx-mcasp-audio";
948 reg-names = "mpu", "dat";
951 interrupt-names = "tx", "rx";
954 dma-names = "tx", "rx";
956 clocks = <&k3_clks 192 0>;
957 clock-names = "fck";
958 assigned-clocks = <&k3_clks 192 0>;
959 assigned-clock-parents = <&k3_clks 192 2>;
960 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;