Lines Matching +full:0 +full:x15110000
39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
128 i-cache-size = <0xc000>;
131 d-cache-size = <0x8000>;
140 reg = <0x0 0x003>;
143 i-cache-size = <0xc000>;
146 d-cache-size = <0x8000>;
156 reg = <0x0 0x100>;
160 i-cache-size = <0xc000>;
163 d-cache-size = <0x8000>;
172 reg = <0x0 0x101>;
176 i-cache-size = <0xc000>;
179 d-cache-size = <0x8000>;
188 reg = <0x0 0x102>;
192 i-cache-size = <0xc000>;
195 d-cache-size = <0x8000>;
204 reg = <0x0 0x103>;
208 i-cache-size = <0xc000>;
211 d-cache-size = <0x8000>;
221 reg = <0x0 0x200>;
225 i-cache-size = <0xc000>;
228 d-cache-size = <0x8000>;
237 reg = <0x0 0x201>;
241 i-cache-size = <0xc000>;
244 d-cache-size = <0x8000>;
253 reg = <0x0 0x202>;
257 i-cache-size = <0xc000>;
260 d-cache-size = <0x8000>;
269 reg = <0x0 0x203>;
273 i-cache-size = <0xc000>;
276 d-cache-size = <0x8000>;
286 cache-size = <0x400000>;
298 arm,psci-suspend-param = <0x0010000>;
342 #clock-cells = <0>;
345 soc: soc@0 {
349 ranges = <0x0 0x0 0x0 0x0 0x0 0x18000000>;
350 dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>;
356 reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */
357 <0x0 0x10600000 0x0 0x200000>; /* GICR_RD+GICR_SGI */
363 reg = <0x0 0x10200000 0x0 0x10000>;
374 /* Per context non-secure context interrupts, 0-3 interrupts */
383 reg = <0x0 0x12100000 0x0 0x10000>;
398 /* Per context non-secure context interrupts, 0-7 interrupts */
411 reg = <0x0 0x14900000 0x0 0x10000>;
420 /* Per context non-secure context interrupts, 0-1 interrupts */
427 reg = <0x0 0x15450000 0x0 0x10000>;
436 /* Per context non-secure context interrupts, 0-1 interrupts */
443 reg = <0x0 0x10010000 0x0 0x3000>;
457 reg = <0x0 0x11c10000 0x0 0x3000>;
465 reg = <0x0 0x12610000 0x0 0x3000>;
473 reg = <0x0 0x12630000 0x0 0x500>;
478 reg = <0x0 0x12810000 0x0 0x3000>;
486 reg = <0x0 0x14010000 0x0 0x3000>;
504 reg = <0x0 0x14030000 0x0 0x1000>;
509 reg = <0x0 0x15010000 0x0 0x3000>;
523 reg = <0x0 0x15030000 0x0 0x1000>;
528 reg = <0x0 0x16810000 0x0 0x3000>;
540 reg = <0x0 0x16830000 0x0 0x1000>;
545 reg = <0x0 0x10100000 0x0 0x1000>;
550 iommus = <&smmu_imem 0x800 0x0>;
555 reg = <0x0 0x10110000 0x0 0x1000>;
560 iommus = <&smmu_imem 0x801 0x0>;
565 reg = <0x0 0x14280000 0x0 0x1000>;
570 iommus = <&smmu_peric 0x2 0x0>;
575 reg = <0x0 0x14290000 0x0 0x1000>;
580 iommus = <&smmu_peric 0x1 0x0>;
585 reg = <0x0 0x14180000 0x0 0x100>;
587 dmas = <&pdma1 1>, <&pdma1 0>;
597 reg = <0x0 0x14190000 0x0 0x100>;
609 reg = <0x0 0x11400000 0x0 0x5000>;
614 reg = <0x0 0x100a0000 0x0 0x100>;
623 reg = <0x0 0x100b0000 0x0 0x100>;
632 reg = <0x0 0x100c0000 0x0 0x100>;
641 reg = <0x0 0x14100000 0x0 0x100>;
642 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
651 reg = <0x0 0x14110000 0x0 0x100>;
652 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
661 reg = <0x0 0x14200000 0x0 0x1000>;
664 #size-cells = <0>;
666 pinctrl-0 = <&hs_i2c0_bus>;
674 reg = <0x0 0x14210000 0x0 0x1000>;
677 #size-cells = <0>;
679 pinctrl-0 = <&hs_i2c1_bus>;
687 reg = <0x0 0x14220000 0x0 0x1000>;
690 #size-cells = <0>;
692 pinctrl-0 = <&hs_i2c2_bus>;
700 reg = <0x0 0x14230000 0x0 0x1000>;
703 #size-cells = <0>;
705 pinctrl-0 = <&hs_i2c3_bus>;
713 reg = <0x0 0x14240000 0x0 0x1000>;
716 #size-cells = <0>;
718 pinctrl-0 = <&hs_i2c4_bus>;
726 reg = <0x0 0x14250000 0x0 0x1000>;
729 #size-cells = <0>;
731 pinctrl-0 = <&hs_i2c5_bus>;
739 reg = <0x0 0x14260000 0x0 0x1000>;
742 #size-cells = <0>;
744 pinctrl-0 = <&hs_i2c6_bus>;
752 reg = <0x0 0x14270000 0x0 0x1000>;
755 #size-cells = <0>;
757 pinctrl-0 = <&hs_i2c7_bus>;
765 reg = <0x0 0x140e0000 0x0 0x100>;
775 pinctrl-0 = <&i2s0_bus>;
782 reg = <0x0 0x140f0000 0x0 0x100>;
792 pinctrl-0 = <&i2s1_bus>;
799 reg = <0x0 0x114f0000 0x0 0x1000>;
804 reg = <0x0 0x141f0000 0x0 0x1000>;
810 reg = <0x0 0x15020000 0x0 0x1000>;
816 reg = <0x0 0x14088000 0x0 0x0200>,
817 <0x0 0x14080000 0x0 0x8000>;
823 pinctrl-0 = <&m_can0_bus>;
827 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
833 reg = <0x0 0x14098000 0x0 0x0200>,
834 <0x0 0x14090000 0x0 0x8000>;
840 pinctrl-0 = <&m_can1_bus>;
844 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
850 reg = <0x0 0x140a8000 0x0 0x0200>,
851 <0x0 0x140a0000 0x0 0x8000>;
857 pinctrl-0 = <&m_can2_bus>;
861 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
867 reg = <0x0 0x140b8000 0x0 0x0200>,
868 <0x0 0x140b0000 0x0 0x8000>;
874 pinctrl-0 = <&m_can3_bus>;
878 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
884 reg = <0x0 0x14140000 0x0 0x100>;
889 #size-cells = <0>;
893 samsung,spi-src-clk = <0>;
895 pinctrl-0 = <&spi0_bus>;
902 reg = <0x0 0x14150000 0x0 0x100>;
907 #size-cells = <0>;
911 samsung,spi-src-clk = <0>;
913 pinctrl-0 = <&spi1_bus>;
920 reg = <0x0 0x14160000 0x0 0x100>;
925 #size-cells = <0>;
929 samsung,spi-src-clk = <0>;
931 pinctrl-0 = <&spi2_bus>;
938 reg = <0x0 0x10040000 0x0 0x800>;
961 reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */
962 <0x0 0x15121100 0x0 0x200>, /* 1: Vendor specified */
963 <0x0 0x15110000 0x0 0x8000>, /* 2: UNIPRO */
964 <0x0 0x15130000 0x0 0x100>; /* 3: UFS protector */
970 freq-table-hz = <0 0>, <0 0>;
972 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
980 reg = <0x0 0x15124000 0x0 0x800>;
983 #phy-cells = <0>;