Lines Matching +full:0 +full:x66000000
21 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0 0x000>;
54 reg = <0 0x001>;
65 reg = <0 0x002>;
76 reg = <0 0x003>;
135 #clock-cells = <0>;
190 reg = <0x0 0x81000000 0x0 0x01000000>;
195 soc@0 {
199 ranges = <0 0 0 0xffffffff>;
204 reg = <0x54006000 0x100>;
206 #size-cells = <0>;
209 pinctrl-0 = <&pinctrl_spi0>;
217 reg = <0x54006100 0x100>;
219 #size-cells = <0>;
222 pinctrl-0 = <&pinctrl_spi1>;
230 reg = <0x54006800 0x40>;
233 pinctrl-0 = <&pinctrl_uart0>;
234 clocks = <&peri_clk 0>;
235 resets = <&peri_rst 0>;
241 reg = <0x54006900 0x40>;
244 pinctrl-0 = <&pinctrl_uart1>;
252 reg = <0x54006a00 0x40>;
255 pinctrl-0 = <&pinctrl_uart2>;
263 reg = <0x54006b00 0x40>;
266 pinctrl-0 = <&pinctrl_uart3>;
273 reg = <0x55000000 0x200>;
279 gpio-ranges = <&pinctrl 0 0 0>,
280 <&pinctrl 104 0 0>,
281 <&pinctrl 168 0 0>;
286 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
293 reg = <0x58780000 0x80>;
295 #size-cells = <0>;
298 pinctrl-0 = <&pinctrl_i2c0>;
307 reg = <0x58781000 0x80>;
309 #size-cells = <0>;
312 pinctrl-0 = <&pinctrl_i2c1>;
321 reg = <0x58782000 0x80>;
323 #size-cells = <0>;
326 pinctrl-0 = <&pinctrl_i2c2>;
335 reg = <0x58783000 0x80>;
337 #size-cells = <0>;
340 pinctrl-0 = <&pinctrl_i2c3>;
349 reg = <0x58786000 0x80>;
351 #size-cells = <0>;
361 reg = <0x58c00000 0x400>;
365 pinctrl-0 = <&pinctrl_system_bus>;
370 reg = <0x59801000 0x400>;
376 reg = <0x59810000 0x400>;
392 reg = <0x59820000 0x200>;
407 reg = <0x5a000000 0x400>;
410 pinctrl-0 = <&pinctrl_emmc>;
427 reg = <0x5a400000 0x800>;
430 pinctrl-0 = <&pinctrl_sd>;
432 clocks = <&sd_clk 0>;
434 resets = <&sd_rst 0>;
440 socionext,syscon-uhs-mode = <&sdctrl 0>;
446 reg = <0x5f800000 0x2000>;
456 reg = <0x5f900000 0x2000>;
459 ranges = <0 0x5f900000 0x2000>;
463 reg = <0x100 0x28>;
468 reg = <0x200 0x68>;
474 reg = <0x54 1>;
478 reg = <0x55 1>;
482 reg = <0x58 1>;
486 reg = <0x59 1>;
489 usb_sel_t0: trim@54,0 {
490 reg = <0x54 1>;
491 bits = <0 4>;
493 usb_sel_t1: trim@55,0 {
494 reg = <0x55 1>;
495 bits = <0 4>;
497 usb_sel_t2: trim@58,0 {
498 reg = <0x58 1>;
499 bits = <0 4>;
501 usb_sel_t3: trim@59,0 {
502 reg = <0x59 1>;
503 bits = <0 4>;
505 usb_hs_i0: trim@56,0 {
506 reg = <0x56 1>;
507 bits = <0 4>;
509 usb_hs_i2: trim@5a,0 {
510 reg = <0x5a 1>;
511 bits = <0 4>;
518 reg = <0x5fc10000 0x5300>;
526 reg = <0x5fc20000 0x200>;
533 reg = <0x5fe00000 0x10000>, /* GICD */
534 <0x5fe80000 0x80000>; /* GICR */
543 reg = <0x61840000 0x10000>;
562 #thermal-sensor-cells = <0>;
563 socionext,tmod-calibration = <0x0f22 0x68ee>;
570 reg = <0x65000000 0x8500>;
573 pinctrl-0 = <&pinctrl_ether_rgmii>;
580 socionext,syscon-phy-mode = <&soc_glue 0>;
584 #size-cells = <0>;
591 reg = <0x65200000 0x8500>;
594 pinctrl-0 = <&pinctrl_ether1_rgmii>;
605 #size-cells = <0>;
613 reg = <0x65600000 0x10000>;
616 resets = <&sys_rst 28>, <&ahci0_rst 0>;
624 reg = <0x65700000 0x100>;
627 ranges = <0 0x65700000 0x100>;
629 ahci0_rst: reset-controller@0 {
631 reg = <0x0 0x4>;
641 reg = <0x10 0x10>;
646 #phy-cells = <0>;
654 reg = <0x65800000 0x10000>;
657 resets = <&sys_rst 29>, <&ahci1_rst 0>;
665 reg = <0x65900000 0x100>;
668 ranges = <0 0x65900000 0x100>;
670 ahci1_rst: reset-controller@0 {
672 reg = <0x0 0x4>;
682 reg = <0x10 0x10>;
687 #phy-cells = <0>;
694 reg = <0x65a00000 0xcd00>;
698 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
710 reg = <0x65b00000 0x400>;
713 ranges = <0 0x65b00000 0x400>;
715 usb0_rst: reset-controller@0 {
717 reg = <0x0 0x4>;
727 reg = <0x100 0x10>;
736 reg = <0x110 0x10>;
745 reg = <0x200 0x10>;
746 #phy-cells = <0>;
759 reg = <0x210 0x10>;
760 #phy-cells = <0>;
773 reg = <0x300 0x10>;
774 #phy-cells = <0>;
784 reg = <0x310 0x10>;
785 #phy-cells = <0>;
797 reg = <0x65c00000 0xcd00>;
801 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
813 reg = <0x65d00000 0x400>;
816 ranges = <0 0x65d00000 0x400>;
818 usb1_rst: reset-controller@0 {
820 reg = <0x0 0x4>;
830 reg = <0x100 0x10>;
839 reg = <0x110 0x10>;
848 reg = <0x200 0x10>;
849 #phy-cells = <0>;
863 reg = <0x210 0x10>;
864 #phy-cells = <0>;
878 reg = <0x300 0x10>;
879 #phy-cells = <0>;
893 reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
894 <0x2fff0000 0x10000>;
901 bus-range = <0x0 0xff>;
905 <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
907 <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
912 interrupt-map-mask = <0 0 0 7>;
913 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
914 <0 0 0 2 &pcie_intc 1>, /* INTB */
915 <0 0 0 3 &pcie_intc 2>, /* INTC */
916 <0 0 0 4 &pcie_intc 3>; /* INTD */
930 reg = <0x66038000 0x4000>;
931 #phy-cells = <0>;
943 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
945 #size-cells = <0>;
948 pinctrl-0 = <&pinctrl_nand>;