Lines Matching +full:0 +full:xffac0080
41 #size-cells = <0>;
69 cpu_l0: cpu@0 {
72 reg = <0x0 0x0>;
84 reg = <0x0 0x1>;
96 reg = <0x0 0x2>;
108 reg = <0x0 0x3>;
120 reg = <0x0 0x100>;
138 reg = <0x0 0x101>;
159 arm,psci-suspend-param = <0x0010000>;
168 arm,psci-suspend-param = <0x1010000>;
207 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
208 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
209 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
210 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
218 #clock-cells = <0>;
223 reg = <0x0 0xf8000000 0x0 0x2000000>,
224 <0x0 0xfd000000 0x0 0x1000000>;
231 bus-range = <0x0 0x1f>;
236 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
237 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
238 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
240 interrupt-map-mask = <0 0 0 7>;
241 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
242 <0 0 0 2 &pcie0_intc 1>,
243 <0 0 0 3 &pcie0_intc 2>,
244 <0 0 0 4 &pcie0_intc 3>;
246 msi-map = <0x0 &its 0x0 0x1000>;
247 phys = <&pcie_phy 0>, <&pcie_phy 1>,
249 phy-names = "pcie-phy-0", "pcie-phy-1",
251 ranges = <0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000>,
252 <0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
263 #address-cells = <0>;
270 reg = <0x0 0xfd000000 0x0 0x1000000>,
271 <0x0 0xfa000000 0x0 0x2000000>;
285 phys = <&pcie_phy 0>, <&pcie_phy 1>,
287 phy-names = "pcie-phy-0", "pcie-phy-1",
291 pinctrl-0 = <&pcie_clkreqnb_cpm>;
297 reg = <0x0 0xfe300000 0x0 0x10000>;
298 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
312 snps,txpbl = <0x4>;
319 reg = <0x0 0xfe310000 0x0 0x4000>;
320 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
325 fifo-depth = <0x100>;
335 reg = <0x0 0xfe320000 0x0 0x4000>;
336 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
343 fifo-depth = <0x100>;
352 reg = <0x0 0xfe330000 0x0 0x10000>;
353 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
360 #clock-cells = <0>;
370 reg = <0x0 0xfe380000 0x0 0x20000>;
371 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
381 reg = <0x0 0xfe3a0000 0x0 0x20000>;
382 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
392 reg = <0x0 0xfe3c0000 0x0 0x20000>;
393 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
403 reg = <0x0 0xfe3e0000 0x0 0x20000>;
404 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
414 reg = <0 0xfe430000 0 0x1000>;
422 reg = <0 0xfe432000 0 0x1000>;
430 reg = <0 0xfe434000 0 0x1000>;
438 reg = <0 0xfe436000 0 0x1000>;
446 reg = <0 0xfe610000 0 0x1000>;
454 reg = <0 0xfe710000 0 0x1000>;
477 reg = <0x0 0xfe800000 0x0 0x100000>;
478 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
513 reg = <0x0 0xfe900000 0x0 0x100000>;
514 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
534 reg = <0x0 0xfec00000 0x0 0x100000>;
535 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
553 #size-cells = <0>;
555 dp_in_vopb: endpoint@0 {
556 reg = <0>;
576 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
577 <0x0 0xfef00000 0 0xc0000>, /* GICR */
578 <0x0 0xfff00000 0 0x10000>, /* GICC */
579 <0x0 0xfff10000 0 0x10000>, /* GICH */
580 <0x0 0xfff20000 0 0x10000>; /* GICV */
581 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
586 reg = <0x0 0xfee20000 0x0 0x20000>;
590 ppi_cluster0: interrupt-partition-0 {
602 reg = <0x0 0xff100000 0x0 0x100>;
603 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
614 reg = <0x0 0xff8b0000 0x0 0x4000>;
615 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>;
624 reg = <0x0 0xff8b8000 0x0 0x4000>;
625 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
634 reg = <0x0 0xff110000 0x0 0x1000>;
639 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
641 pinctrl-0 = <&i2c1_xfer>;
643 #size-cells = <0>;
649 reg = <0x0 0xff120000 0x0 0x1000>;
654 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
656 pinctrl-0 = <&i2c2_xfer>;
658 #size-cells = <0>;
664 reg = <0x0 0xff130000 0x0 0x1000>;
669 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
671 pinctrl-0 = <&i2c3_xfer>;
673 #size-cells = <0>;
679 reg = <0x0 0xff140000 0x0 0x1000>;
684 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-0 = <&i2c5_xfer>;
688 #size-cells = <0>;
694 reg = <0x0 0xff150000 0x0 0x1000>;
699 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
701 pinctrl-0 = <&i2c6_xfer>;
703 #size-cells = <0>;
709 reg = <0x0 0xff160000 0x0 0x1000>;
714 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
716 pinctrl-0 = <&i2c7_xfer>;
718 #size-cells = <0>;
724 reg = <0x0 0xff180000 0x0 0x100>;
727 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
731 pinctrl-0 = <&uart0_xfer>;
737 reg = <0x0 0xff190000 0x0 0x100>;
740 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
744 pinctrl-0 = <&uart1_xfer>;
750 reg = <0x0 0xff1a0000 0x0 0x100>;
753 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
757 pinctrl-0 = <&uart2c_xfer>;
763 reg = <0x0 0xff1b0000 0x0 0x100>;
766 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
770 pinctrl-0 = <&uart3_xfer>;
776 reg = <0x0 0xff1c0000 0x0 0x1000>;
779 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
783 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
785 #size-cells = <0>;
791 reg = <0x0 0xff1d0000 0x0 0x1000>;
794 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
798 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
800 #size-cells = <0>;
806 reg = <0x0 0xff1e0000 0x0 0x1000>;
809 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
813 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
815 #size-cells = <0>;
821 reg = <0x0 0xff1f0000 0x0 0x1000>;
824 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
828 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
830 #size-cells = <0>;
836 reg = <0x0 0xff200000 0x0 0x1000>;
839 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
843 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
846 #size-cells = <0>;
855 thermal-sensors = <&tsadc 0>;
926 reg = <0x0 0xff260000 0x0 0x100>;
927 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
937 pinctrl-0 = <&otp_pin>;
946 reg = <0x0 0xffa58000 0x0 0x20>;
951 reg = <0x0 0xffa5c000 0x0 0x20>;
956 reg = <0x0 0xffa60080 0x0 0x20>;
961 reg = <0x0 0xffa60100 0x0 0x20>;
966 reg = <0x0 0xffa60180 0x0 0x20>;
971 reg = <0x0 0xffa70000 0x0 0x20>;
976 reg = <0x0 0xffa70080 0x0 0x20>;
981 reg = <0x0 0xffa74000 0x0 0x20>;
986 reg = <0x0 0xffa76000 0x0 0x20>;
991 reg = <0x0 0xffa90000 0x0 0x20>;
996 reg = <0x0 0xffa98000 0x0 0x20>;
1001 reg = <0x0 0xffaa0000 0x0 0x20>;
1006 reg = <0x0 0xffaa0080 0x0 0x20>;
1011 reg = <0x0 0xffaa8000 0x0 0x20>;
1016 reg = <0x0 0xffaa8080 0x0 0x20>;
1021 reg = <0x0 0xffab0000 0x0 0x20>;
1026 reg = <0x0 0xffab0080 0x0 0x20>;
1031 reg = <0x0 0xffab8000 0x0 0x20>;
1036 reg = <0x0 0xffac0000 0x0 0x20>;
1041 reg = <0x0 0xffac0080 0x0 0x20>;
1046 reg = <0x0 0xffac8000 0x0 0x20>;
1051 reg = <0x0 0xffac8080 0x0 0x20>;
1056 reg = <0x0 0xffad0000 0x0 0x20>;
1061 reg = <0x0 0xffad8080 0x0 0x20>;
1066 reg = <0x0 0xffae0000 0x0 0x20>;
1071 reg = <0x0 0xff310000 0x0 0x1000>;
1084 #size-cells = <0>;
1092 #power-domain-cells = <0>;
1100 #power-domain-cells = <0>;
1107 #power-domain-cells = <0>;
1117 #power-domain-cells = <0>;
1125 #power-domain-cells = <0>;
1132 #power-domain-cells = <0>;
1138 #power-domain-cells = <0>;
1145 #power-domain-cells = <0>;
1152 #power-domain-cells = <0>;
1158 #power-domain-cells = <0>;
1164 #power-domain-cells = <0>;
1170 #power-domain-cells = <0>;
1177 #power-domain-cells = <0>;
1183 #size-cells = <0>;
1191 #power-domain-cells = <0>;
1199 #power-domain-cells = <0>;
1207 #power-domain-cells = <0>;
1213 #size-cells = <0>;
1221 #power-domain-cells = <0>;
1228 #power-domain-cells = <0>;
1237 reg = <0x0 0xff320000 0x0 0x1000>;
1247 reg = <0x0 0xff350000 0x0 0x1000>;
1250 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1252 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1254 #size-cells = <0>;
1260 reg = <0x0 0xff370000 0x0 0x100>;
1263 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1267 pinctrl-0 = <&uart4_xfer>;
1273 reg = <0x0 0xff3c0000 0x0 0x1000>;
1278 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1280 pinctrl-0 = <&i2c0_xfer>;
1282 #size-cells = <0>;
1288 reg = <0x0 0xff3d0000 0x0 0x1000>;
1293 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1295 pinctrl-0 = <&i2c4_xfer>;
1297 #size-cells = <0>;
1303 reg = <0x0 0xff3e0000 0x0 0x1000>;
1308 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1310 pinctrl-0 = <&i2c8_xfer>;
1312 #size-cells = <0>;
1318 reg = <0x0 0xff420000 0x0 0x10>;
1321 pinctrl-0 = <&pwm0_pin>;
1328 reg = <0x0 0xff420010 0x0 0x10>;
1331 pinctrl-0 = <&pwm1_pin>;
1338 reg = <0x0 0xff420020 0x0 0x10>;
1341 pinctrl-0 = <&pwm2_pin>;
1348 reg = <0x0 0xff420030 0x0 0x10>;
1351 pinctrl-0 = <&pwm3a_pin>;
1357 reg = <0x00 0xff630000 0x00 0x4000>;
1360 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1368 reg = <0x0 0xff650000 0x0 0x800>;
1369 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1370 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1380 reg = <0x0 0xff650800 0x0 0x40>;
1381 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1384 #iommu-cells = <0>;
1390 reg = <0x0 0xff660000 0x0 0x480>;
1391 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1401 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1402 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1406 #iommu-cells = <0>;
1411 reg = <0x0 0xff670800 0x0 0x40>;
1412 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1415 #iommu-cells = <0>;
1421 reg = <0x0 0xff680000 0x0 0x10000>;
1422 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1432 reg = <0x0 0xff690000 0x0 0x80>;
1440 reg = <0x07 0x10>;
1443 reg = <0x17 0x1>;
1446 reg = <0x18 0x1>;
1449 reg = <0x19 0x1>;
1452 reg = <0x1a 0x1>;
1455 reg = <0x1b 0x1>;
1458 reg = <0x1c 0x1>;
1464 reg = <0x0 0xff6d0000 0x0 0x4000>;
1465 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
1466 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
1475 reg = <0x0 0xff6e0000 0x0 0x4000>;
1476 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
1477 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
1486 reg = <0x0 0xff750000 0x0 0x1000>;
1498 reg = <0x0 0xff760000 0x0 0x1000>;
1532 reg = <0x0 0xff770000 0x0 0x10000>;
1548 #phy-cells = <0>;
1554 reg = <0xe450 0x10>;
1557 #clock-cells = <0>;
1562 #phy-cells = <0>;
1563 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1569 #phy-cells = <0>;
1570 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1571 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1572 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1581 reg = <0xe460 0x10>;
1584 #clock-cells = <0>;
1589 #phy-cells = <0>;
1590 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1596 #phy-cells = <0>;
1597 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1598 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1599 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1608 reg = <0xf780 0x24>;
1612 #phy-cells = <0>;
1629 reg = <0x0 0xff7c0000 0x0 0x40000>;
1644 #phy-cells = <0>;
1648 #phy-cells = <0>;
1654 reg = <0x0 0xff800000 0x0 0x40000>;
1669 #phy-cells = <0>;
1673 #phy-cells = <0>;
1679 reg = <0x0 0xff848000 0x0 0x100>;
1681 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1686 reg = <0x0 0xff850000 0x0 0x1000>;
1687 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1694 reg = <0x0 0xff870000 0x0 0x1000>;
1695 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1701 pinctrl-0 = <&spdif_bus>;
1703 #sound-dai-cells = <0>;
1709 reg = <0x0 0xff880000 0x0 0x1000>;
1711 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1712 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1717 pinctrl-0 = <&i2s0_8ch_bus>;
1720 #sound-dai-cells = <0>;
1726 reg = <0x0 0xff890000 0x0 0x1000>;
1727 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1733 pinctrl-0 = <&i2s1_2ch_bus>;
1735 #sound-dai-cells = <0>;
1741 reg = <0x0 0xff8a0000 0x0 0x1000>;
1742 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1748 #sound-dai-cells = <0>;
1754 reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>;
1755 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1768 #size-cells = <0>;
1770 vopl_out_mipi: endpoint@0 {
1771 reg = <0>;
1799 reg = <0x0 0xff8f3f00 0x0 0x100>;
1800 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1804 #iommu-cells = <0>;
1810 reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>;
1811 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1824 #size-cells = <0>;
1826 vopb_out_edp: endpoint@0 {
1827 reg = <0>;
1855 reg = <0x0 0xff903f00 0x0 0x100>;
1856 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1860 #iommu-cells = <0>;
1866 reg = <0x0 0xff910000 0x0 0x4000>;
1867 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1880 #size-cells = <0>;
1882 port@0 {
1883 reg = <0>;
1885 #size-cells = <0>;
1892 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1893 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1896 #iommu-cells = <0>;
1903 reg = <0x0 0xff920000 0x0 0x4000>;
1904 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1917 #size-cells = <0>;
1919 port@0 {
1920 reg = <0>;
1922 #size-cells = <0>;
1929 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
1930 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
1933 #iommu-cells = <0>;
1955 reg = <0x0 0xff940000 0x0 0x20000>;
1957 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
1966 #sound-dai-cells = <0>;
1971 #size-cells = <0>;
1973 hdmi_in: port@0 {
1974 reg = <0>;
1976 #size-cells = <0>;
1978 hdmi_in_vopb: endpoint@0 {
1979 reg = <0>;
1996 reg = <0x0 0xff960000 0x0 0x8000>;
1997 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
2006 #size-cells = <0>;
2011 #size-cells = <0>;
2013 mipi_in: port@0 {
2014 reg = <0>;
2016 #size-cells = <0>;
2018 mipi_in_vopb: endpoint@0 {
2019 reg = <0>;
2037 reg = <0x0 0xff968000 0x0 0x8000>;
2038 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
2047 #size-cells = <0>;
2048 #phy-cells = <0>;
2053 #size-cells = <0>;
2055 mipi1_in: port@0 {
2056 reg = <0>;
2058 #size-cells = <0>;
2060 mipi1_in_vopb: endpoint@0 {
2061 reg = <0>;
2079 reg = <0x0 0xff970000 0x0 0x8000>;
2080 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
2084 pinctrl-0 = <&edp_hpd>;
2093 #size-cells = <0>;
2095 edp_in: port@0 {
2096 reg = <0>;
2098 #size-cells = <0>;
2100 edp_in_vopb: endpoint@0 {
2101 reg = <0>;
2119 reg = <0x0 0xff9a0000 0x0 0x10000>;
2120 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
2121 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
2122 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
2140 reg = <0x0 0xff720000 0x0 0x100>;
2142 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
2145 #gpio-cells = <0x2>;
2148 #interrupt-cells = <0x2>;
2153 reg = <0x0 0xff730000 0x0 0x100>;
2155 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
2158 #gpio-cells = <0x2>;
2161 #interrupt-cells = <0x2>;
2166 reg = <0x0 0xff780000 0x0 0x100>;
2168 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
2171 #gpio-cells = <0x2>;
2174 #interrupt-cells = <0x2>;
2179 reg = <0x0 0xff788000 0x0 0x100>;
2181 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
2184 #gpio-cells = <0x2>;
2187 #interrupt-cells = <0x2>;
2192 reg = <0x0 0xff790000 0x0 0x100>;
2194 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
2197 #gpio-cells = <0x2>;
2200 #interrupt-cells = <0x2>;
2304 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2568 <0 RK_PA3 1 &pcfg_pull_up>;
2573 <0 RK_PA4 1 &pcfg_pull_up>;
2603 <0 RK_PA7 1 &pcfg_pull_up>;
2608 <0 RK_PB0 1 &pcfg_pull_up>;
2618 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2755 <0 RK_PA0 1 &pcfg_pull_none>;
2765 <0 RK_PB0 3 &pcfg_pull_none>;
2912 <0 RK_PA6 1 &pcfg_pull_none>;