Lines Matching refs:CPG_MOD
240 clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
255 clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
256 <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
275 clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,
276 <&cpg CPG_MOD R9A07G044_SSI1_PCLK_SFR>,
294 clocks = <&cpg CPG_MOD R9A07G044_SSI2_PCLK2>,
295 <&cpg CPG_MOD R9A07G044_SSI2_PCLK_SFR>,
314 clocks = <&cpg CPG_MOD R9A07G044_SSI3_PCLK2>,
315 <&cpg CPG_MOD R9A07G044_SSI3_PCLK_SFR>,
333 clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
351 clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
369 clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
391 clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
409 clocks = <&cpg CPG_MOD R9A07G044_SCIF1_CLK_PCK>;
427 clocks = <&cpg CPG_MOD R9A07G044_SCIF2_CLK_PCK>;
445 clocks = <&cpg CPG_MOD R9A07G044_SCIF3_CLK_PCK>;
463 clocks = <&cpg CPG_MOD R9A07G044_SCIF4_CLK_PCK>;
478 clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
493 clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;
514 clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,
549 clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
571 clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
593 clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
615 clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
626 clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
627 <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
668 clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
682 clocks = <&cpg CPG_MOD R9A07G044_SPI_CLK2>,
683 <&cpg CPG_MOD R9A07G044_SPI_CLK>;
694 clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
695 <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
696 <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
739 clocks = <&cpg CPG_MOD R9A07G044_CRU_SYSCLK>,
740 <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
741 <&cpg CPG_MOD R9A07G044_CRU_PCLK>;
783 clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,
784 <&cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK>,
785 <&cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK>,
786 <&cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK>,
787 <&cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK>,
788 <&cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK>;
802 clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
803 <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
804 <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
815 clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
816 <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
817 <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
854 clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>;
929 clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
930 <&cpg CPG_MOD R9A07G044_IA55_PCLK>;
963 clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
964 <&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
983 clocks = <&cpg CPG_MOD R9A07G044_GPU_CLK>,
984 <&cpg CPG_MOD R9A07G044_GPU_AXI_CLK>,
985 <&cpg CPG_MOD R9A07G044_GPU_ACE_CLK>;
1011 clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
1012 <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
1013 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
1014 <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
1027 clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
1028 <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
1029 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
1030 <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
1046 clocks = <&cpg CPG_MOD R9A07G044_ETH0_CLK_AXI>,
1047 <&cpg CPG_MOD R9A07G044_ETH0_CLK_CHI>,
1066 clocks = <&cpg CPG_MOD R9A07G044_ETH1_CLK_AXI>,
1067 <&cpg CPG_MOD R9A07G044_ETH1_CLK_CHI>,
1081 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
1092 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1093 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
1106 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1107 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
1120 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1121 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
1135 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1136 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
1151 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1152 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
1164 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1165 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
1180 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
1181 <&cpg CPG_MOD R9A07G044_USB_U2P_EXR_CPUCLK>;
1195 clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
1196 <&cpg CPG_MOD R9A07G044_WDT0_CLK>;
1210 clocks = <&cpg CPG_MOD R9A07G044_WDT1_PCLK>,
1211 <&cpg CPG_MOD R9A07G044_WDT1_CLK>;
1226 clocks = <&cpg CPG_MOD R9A07G044_OSTM0_PCLK>;
1237 clocks = <&cpg CPG_MOD R9A07G044_OSTM1_PCLK>;
1248 clocks = <&cpg CPG_MOD R9A07G044_OSTM2_PCLK>;