Lines Matching full:cpg

8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
79 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
91 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
161 clocks = <&cpg CPG_MOD 402>;
163 resets = <&cpg 402>;
177 clocks = <&cpg CPG_MOD 912>;
179 resets = <&cpg 912>;
192 clocks = <&cpg CPG_MOD 911>;
194 resets = <&cpg 911>;
207 clocks = <&cpg CPG_MOD 910>;
209 resets = <&cpg 910>;
222 clocks = <&cpg CPG_MOD 909>;
224 resets = <&cpg 909>;
237 clocks = <&cpg CPG_MOD 908>;
239 resets = <&cpg 908>;
252 clocks = <&cpg CPG_MOD 907>;
254 resets = <&cpg 907>;
267 clocks = <&cpg CPG_MOD 906>;
269 resets = <&cpg 906>;
285 clocks = <&cpg CPG_MOD 926>;
287 resets = <&cpg 926>;
299 clocks = <&cpg CPG_MOD 303>;
302 resets = <&cpg 303>;
318 clocks = <&cpg CPG_MOD 302>;
321 resets = <&cpg 302>;
337 clocks = <&cpg CPG_MOD 301>;
340 resets = <&cpg 301>;
356 clocks = <&cpg CPG_MOD 300>;
359 resets = <&cpg 300>;
363 cpg: clock-controller@e6150000 { label
364 compatible = "renesas,r8a77990-cpg-mssr";
390 clocks = <&cpg CPG_MOD 522>;
392 resets = <&cpg 522>;
407 clocks = <&cpg CPG_MOD 407>;
409 resets = <&cpg 407>;
418 clocks = <&cpg CPG_MOD 125>;
421 resets = <&cpg 125>;
431 clocks = <&cpg CPG_MOD 124>;
434 resets = <&cpg 124>;
444 clocks = <&cpg CPG_MOD 123>;
447 resets = <&cpg 123>;
457 clocks = <&cpg CPG_MOD 122>;
460 resets = <&cpg 122>;
470 clocks = <&cpg CPG_MOD 121>;
473 resets = <&cpg 121>;
484 clocks = <&cpg CPG_MOD 931>;
486 resets = <&cpg 931>;
501 clocks = <&cpg CPG_MOD 930>;
503 resets = <&cpg 930>;
518 clocks = <&cpg CPG_MOD 929>;
520 resets = <&cpg 929>;
535 clocks = <&cpg CPG_MOD 928>;
537 resets = <&cpg 928>;
551 clocks = <&cpg CPG_MOD 927>;
553 resets = <&cpg 927>;
567 clocks = <&cpg CPG_MOD 919>;
569 resets = <&cpg 919>;
583 clocks = <&cpg CPG_MOD 918>;
585 resets = <&cpg 918>;
599 clocks = <&cpg CPG_MOD 1003>;
601 resets = <&cpg 1003>;
612 clocks = <&cpg CPG_MOD 520>,
613 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
620 resets = <&cpg 520>;
630 clocks = <&cpg CPG_MOD 519>,
631 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
638 resets = <&cpg 519>;
648 clocks = <&cpg CPG_MOD 518>,
649 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
656 resets = <&cpg 518>;
666 clocks = <&cpg CPG_MOD 517>,
667 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
673 resets = <&cpg 517>;
683 clocks = <&cpg CPG_MOD 516>,
684 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
690 resets = <&cpg 516>;
699 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
707 resets = <&cpg 704>, <&cpg 703>;
718 clocks = <&cpg CPG_MOD 330>;
720 resets = <&cpg 330>;
732 clocks = <&cpg CPG_MOD 331>;
734 resets = <&cpg 331>;
743 clocks = <&cpg CPG_MOD 229>;
744 resets = <&cpg 229>;
774 clocks = <&cpg CPG_MOD 219>;
777 resets = <&cpg 219>;
816 clocks = <&cpg CPG_MOD 218>;
819 resets = <&cpg 218>;
858 clocks = <&cpg CPG_MOD 217>;
861 resets = <&cpg 217>;
991 clocks = <&cpg CPG_MOD 812>;
994 resets = <&cpg 812>;
1008 clocks = <&cpg CPG_MOD 916>,
1009 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1012 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1015 resets = <&cpg 916>;
1024 clocks = <&cpg CPG_MOD 915>,
1025 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1028 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1031 resets = <&cpg 915>;
1042 clocks = <&cpg CPG_MOD 914>,
1043 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1046 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1049 resets = <&cpg 914>;
1064 clocks = <&cpg CPG_MOD 523>;
1066 resets = <&cpg 523>;
1074 clocks = <&cpg CPG_MOD 523>;
1076 resets = <&cpg 523>;
1084 clocks = <&cpg CPG_MOD 523>;
1086 resets = <&cpg 523>;
1094 clocks = <&cpg CPG_MOD 523>;
1096 resets = <&cpg 523>;
1104 clocks = <&cpg CPG_MOD 523>;
1106 resets = <&cpg 523>;
1114 clocks = <&cpg CPG_MOD 523>;
1116 resets = <&cpg 523>;
1124 clocks = <&cpg CPG_MOD 523>;
1126 resets = <&cpg 523>;
1136 clocks = <&cpg CPG_MOD 207>,
1137 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1144 resets = <&cpg 207>;
1153 clocks = <&cpg CPG_MOD 206>,
1154 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1161 resets = <&cpg 206>;
1170 clocks = <&cpg CPG_MOD 310>,
1171 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1178 resets = <&cpg 310>;
1187 clocks = <&cpg CPG_MOD 204>,
1188 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1194 resets = <&cpg 204>;
1203 clocks = <&cpg CPG_MOD 203>,
1204 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1210 resets = <&cpg 203>;
1219 clocks = <&cpg CPG_MOD 202>,
1220 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1226 resets = <&cpg 202>;
1235 clocks = <&cpg CPG_MOD 211>;
1240 resets = <&cpg 211>;
1251 clocks = <&cpg CPG_MOD 210>;
1255 resets = <&cpg 210>;
1266 clocks = <&cpg CPG_MOD 209>;
1270 resets = <&cpg 209>;
1281 clocks = <&cpg CPG_MOD 208>;
1285 resets = <&cpg 208>;
1295 clocks = <&cpg CPG_MOD 807>;
1297 resets = <&cpg 807>;
1323 clocks = <&cpg CPG_MOD 806>;
1325 resets = <&cpg 806>;
1352 clocks = <&cpg CPG_MOD 515>;
1357 resets = <&cpg 515>;
1367 clocks = <&cpg CPG_MOD 514>;
1372 resets = <&cpg 514>;
1382 clocks = <&cpg CPG_MOD 513>;
1387 resets = <&cpg 513>;
1397 clocks = <&cpg CPG_MOD 512>;
1402 resets = <&cpg 512>;
1412 clocks = <&cpg CPG_MOD 511>;
1417 resets = <&cpg 511>;
1427 clocks = <&cpg CPG_MOD 510>;
1432 resets = <&cpg 510>;
1442 clocks = <&cpg CPG_MOD 509>;
1447 resets = <&cpg 509>;
1457 clocks = <&cpg CPG_MOD 508>;
1462 resets = <&cpg 508>;
1488 clocks = <&cpg CPG_MOD 1005>,
1489 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1490 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1491 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1492 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1493 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1494 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1495 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1496 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1497 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1498 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1499 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1500 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1501 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1504 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1517 resets = <&cpg 1005>,
1518 <&cpg 1006>, <&cpg 1007>,
1519 <&cpg 1008>, <&cpg 1009>,
1520 <&cpg 1010>, <&cpg 1011>,
1521 <&cpg 1012>, <&cpg 1013>,
1522 <&cpg 1014>, <&cpg 1015>;
1679 clocks = <&cpg CPG_MOD 802>;
1681 resets = <&cpg 802>;
1711 clocks = <&cpg CPG_MOD 502>;
1714 resets = <&cpg 502>;
1732 clocks = <&cpg CPG_MOD 328>;
1734 resets = <&cpg 328>;
1743 clocks = <&cpg CPG_MOD 328>;
1745 resets = <&cpg 328>;
1753 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1757 resets = <&cpg 703>, <&cpg 704>;
1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1770 resets = <&cpg 703>, <&cpg 704>;
1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1781 resets = <&cpg 703>, <&cpg 704>;
1791 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1795 resets = <&cpg 314>;
1805 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1809 resets = <&cpg 313>;
1819 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1823 resets = <&cpg 311>;
1836 clocks = <&cpg CPG_MOD 917>;
1838 resets = <&cpg 917>;
1855 clocks = <&cpg CPG_MOD 408>;
1858 resets = <&cpg 408>;
1881 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1884 resets = <&cpg 319>;
1894 clocks = <&cpg CPG_MOD 626>;
1896 resets = <&cpg 626>;
1903 clocks = <&cpg CPG_MOD 607>;
1905 resets = <&cpg 607>;
1913 clocks = <&cpg CPG_MOD 631>;
1915 resets = <&cpg 631>;
1922 clocks = <&cpg CPG_MOD 611>;
1924 resets = <&cpg 611>;
1932 clocks = <&cpg CPG_MOD 623>;
1934 resets = <&cpg 623>;
1941 clocks = <&cpg CPG_MOD 603>;
1943 resets = <&cpg 603>;
1951 clocks = <&cpg CPG_MOD 622>;
1953 resets = <&cpg 622>;
1960 clocks = <&cpg CPG_MOD 602>;
1962 resets = <&cpg 602>;
1971 clocks = <&cpg CPG_MOD 711>;
1972 resets = <&cpg 711>;
1980 clocks = <&cpg CPG_MOD 710>;
1981 resets = <&cpg 710>;
1988 clocks = <&cpg CPG_MOD 716>;
1990 resets = <&cpg 716>;
2024 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2026 resets = <&cpg 724>;
2061 clocks = <&cpg CPG_MOD 727>;
2063 resets = <&cpg 727>;
2088 clocks = <&cpg CPG_MOD 727>;
2090 resets = <&cpg 726>;