Lines Matching +full:- +full:resets

1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 /* External CAN clock - to be overridden by boards that provide it */
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
54 cluster0_opp: opp-table-0 {
55 compatible = "operating-points-v2";
56 opp-shared;
58 opp-500000000 {
59 opp-hz = /bits/ 64 <500000000>;
60 opp-microvolt = <830000>;
61 clock-latency-ns = <300000>;
63 opp-1000000000 {
64 opp-hz = /bits/ 64 <1000000000>;
65 opp-microvolt = <830000>;
66 clock-latency-ns = <300000>;
68 opp-1500000000 {
69 opp-hz = /bits/ 64 <1500000000>;
70 opp-microvolt = <830000>;
71 clock-latency-ns = <300000>;
72 opp-suspend;
74 opp-1600000000 {
75 opp-hz = /bits/ 64 <1600000000>;
76 opp-microvolt = <900000>;
77 clock-latency-ns = <300000>;
79 opp-1700000000 {
80 opp-hz = /bits/ 64 <1700000000>;
81 opp-microvolt = <900000>;
82 clock-latency-ns = <300000>;
84 opp-1800000000 {
85 opp-hz = /bits/ 64 <1800000000>;
86 opp-microvolt = <960000>;
87 clock-latency-ns = <300000>;
88 turbo-mode;
93 #address-cells = <1>;
94 #size-cells = <0>;
97 compatible = "arm,cortex-a57";
100 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
101 next-level-cache = <&L2_CA57>;
102 enable-method = "psci";
103 cpu-idle-states = <&CPU_SLEEP_0>;
104 #cooling-cells = <2>;
105 dynamic-power-coefficient = <854>;
107 operating-points-v2 = <&cluster0_opp>;
111 compatible = "arm,cortex-a57";
114 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
115 next-level-cache = <&L2_CA57>;
116 enable-method = "psci";
117 cpu-idle-states = <&CPU_SLEEP_0>;
119 operating-points-v2 = <&cluster0_opp>;
122 L2_CA57: cache-controller-0 {
124 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
125 cache-unified;
126 cache-level = <2>;
129 idle-states {
130 entry-method = "psci";
132 CPU_SLEEP_0: cpu-sleep-0 {
133 compatible = "arm,idle-state";
134 arm,psci-suspend-param = <0x0010000>;
135 local-timer-stop;
136 entry-latency-us = <400>;
137 exit-latency-us = <500>;
138 min-residency-us = <4000>;
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
147 clock-frequency = <0>;
151 compatible = "fixed-clock";
152 #clock-cells = <0>;
154 clock-frequency = <0>;
157 /* External PCIe clock - can be overridden by the board */
159 compatible = "fixed-clock";
160 #clock-cells = <0>;
161 clock-frequency = <0>;
165 compatible = "arm,cortex-a57-pmu";
166 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
168 interrupt-affinity = <&a57_0>,
173 compatible = "arm,psci-1.0", "arm,psci-0.2";
177 /* External SCIF clock - to be overridden by boards that provide it */
179 compatible = "fixed-clock";
180 #clock-cells = <0>;
181 clock-frequency = <0>;
185 compatible = "simple-bus";
186 interrupt-parent = <&gic>;
187 #address-cells = <2>;
188 #size-cells = <2>;
192 compatible = "renesas,r8a77965-wdt",
193 "renesas,rcar-gen3-wdt";
197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
198 resets = <&cpg 402>;
203 compatible = "renesas,gpio-r8a77965",
204 "renesas,rcar-gen3-gpio";
207 #gpio-cells = <2>;
208 gpio-controller;
209 gpio-ranges = <&pfc 0 0 16>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
214 resets = <&cpg 912>;
218 compatible = "renesas,gpio-r8a77965",
219 "renesas,rcar-gen3-gpio";
222 #gpio-cells = <2>;
223 gpio-controller;
224 gpio-ranges = <&pfc 0 32 29>;
225 #interrupt-cells = <2>;
226 interrupt-controller;
228 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
229 resets = <&cpg 911>;
233 compatible = "renesas,gpio-r8a77965",
234 "renesas,rcar-gen3-gpio";
237 #gpio-cells = <2>;
238 gpio-controller;
239 gpio-ranges = <&pfc 0 64 15>;
240 #interrupt-cells = <2>;
241 interrupt-controller;
243 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
244 resets = <&cpg 910>;
248 compatible = "renesas,gpio-r8a77965",
249 "renesas,rcar-gen3-gpio";
252 #gpio-cells = <2>;
253 gpio-controller;
254 gpio-ranges = <&pfc 0 96 16>;
255 #interrupt-cells = <2>;
256 interrupt-controller;
258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
259 resets = <&cpg 909>;
263 compatible = "renesas,gpio-r8a77965",
264 "renesas,rcar-gen3-gpio";
267 #gpio-cells = <2>;
268 gpio-controller;
269 gpio-ranges = <&pfc 0 128 18>;
270 #interrupt-cells = <2>;
271 interrupt-controller;
273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
274 resets = <&cpg 908>;
278 compatible = "renesas,gpio-r8a77965",
279 "renesas,rcar-gen3-gpio";
282 #gpio-cells = <2>;
283 gpio-controller;
284 gpio-ranges = <&pfc 0 160 26>;
285 #interrupt-cells = <2>;
286 interrupt-controller;
288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
289 resets = <&cpg 907>;
293 compatible = "renesas,gpio-r8a77965",
294 "renesas,rcar-gen3-gpio";
297 #gpio-cells = <2>;
298 gpio-controller;
299 gpio-ranges = <&pfc 0 192 32>;
300 #interrupt-cells = <2>;
301 interrupt-controller;
303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
304 resets = <&cpg 906>;
308 compatible = "renesas,gpio-r8a77965",
309 "renesas,rcar-gen3-gpio";
312 #gpio-cells = <2>;
313 gpio-controller;
314 gpio-ranges = <&pfc 0 224 4>;
315 #interrupt-cells = <2>;
316 interrupt-controller;
318 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
319 resets = <&cpg 905>;
323 compatible = "renesas,pfc-r8a77965";
328 compatible = "renesas,r8a77965-cmt0",
329 "renesas,rcar-gen3-cmt0";
334 clock-names = "fck";
335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
336 resets = <&cpg 303>;
341 compatible = "renesas,r8a77965-cmt1",
342 "renesas,rcar-gen3-cmt1";
353 clock-names = "fck";
354 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
355 resets = <&cpg 302>;
360 compatible = "renesas,r8a77965-cmt1",
361 "renesas,rcar-gen3-cmt1";
372 clock-names = "fck";
373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
374 resets = <&cpg 301>;
379 compatible = "renesas,r8a77965-cmt1",
380 "renesas,rcar-gen3-cmt1";
391 clock-names = "fck";
392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
393 resets = <&cpg 300>;
397 cpg: clock-controller@e6150000 {
398 compatible = "renesas,r8a77965-cpg-mssr";
401 clock-names = "extal", "extalr";
402 #clock-cells = <2>;
403 #power-domain-cells = <0>;
404 #reset-cells = <1>;
407 rst: reset-controller@e6160000 {
408 compatible = "renesas,r8a77965-rst";
412 sysc: system-controller@e6180000 {
413 compatible = "renesas,r8a77965-sysc";
415 #power-domain-cells = <1>;
419 compatible = "renesas,r8a77965-thermal";
427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
428 resets = <&cpg 522>;
429 #thermal-sensor-cells = <1>;
432 intc_ex: interrupt-controller@e61c0000 {
433 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
434 #interrupt-cells = <2>;
435 interrupt-controller;
444 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
445 resets = <&cpg 407>;
449 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
455 clock-names = "fck";
456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
457 resets = <&cpg 125>;
462 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
468 clock-names = "fck";
469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
470 resets = <&cpg 124>;
475 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
481 clock-names = "fck";
482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
483 resets = <&cpg 123>;
488 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
494 clock-names = "fck";
495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
496 resets = <&cpg 122>;
501 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
507 clock-names = "fck";
508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
509 resets = <&cpg 121>;
514 #address-cells = <1>;
515 #size-cells = <0>;
516 compatible = "renesas,i2c-r8a77965",
517 "renesas,rcar-gen3-i2c";
521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
522 resets = <&cpg 931>;
525 dma-names = "tx", "rx", "tx", "rx";
526 i2c-scl-internal-delay-ns = <110>;
531 #address-cells = <1>;
532 #size-cells = <0>;
533 compatible = "renesas,i2c-r8a77965",
534 "renesas,rcar-gen3-i2c";
538 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
539 resets = <&cpg 930>;
542 dma-names = "tx", "rx", "tx", "rx";
543 i2c-scl-internal-delay-ns = <6>;
548 #address-cells = <1>;
549 #size-cells = <0>;
550 compatible = "renesas,i2c-r8a77965",
551 "renesas,rcar-gen3-i2c";
555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
556 resets = <&cpg 929>;
559 dma-names = "tx", "rx", "tx", "rx";
560 i2c-scl-internal-delay-ns = <6>;
565 #address-cells = <1>;
566 #size-cells = <0>;
567 compatible = "renesas,i2c-r8a77965",
568 "renesas,rcar-gen3-i2c";
572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
573 resets = <&cpg 928>;
575 dma-names = "tx", "rx";
576 i2c-scl-internal-delay-ns = <110>;
581 #address-cells = <1>;
582 #size-cells = <0>;
583 compatible = "renesas,i2c-r8a77965",
584 "renesas,rcar-gen3-i2c";
588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
589 resets = <&cpg 927>;
591 dma-names = "tx", "rx";
592 i2c-scl-internal-delay-ns = <110>;
597 #address-cells = <1>;
598 #size-cells = <0>;
599 compatible = "renesas,i2c-r8a77965",
600 "renesas,rcar-gen3-i2c";
604 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
605 resets = <&cpg 919>;
607 dma-names = "tx", "rx";
608 i2c-scl-internal-delay-ns = <110>;
613 #address-cells = <1>;
614 #size-cells = <0>;
615 compatible = "renesas,i2c-r8a77965",
616 "renesas,rcar-gen3-i2c";
620 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
621 resets = <&cpg 918>;
623 dma-names = "tx", "rx";
624 i2c-scl-internal-delay-ns = <6>;
629 #address-cells = <1>;
630 #size-cells = <0>;
631 compatible = "renesas,iic-r8a77965",
632 "renesas,rcar-gen3-iic",
633 "renesas,rmobile-iic";
637 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
638 resets = <&cpg 926>;
640 dma-names = "tx", "rx";
645 compatible = "renesas,hscif-r8a77965",
646 "renesas,rcar-gen3-hscif",
653 clock-names = "fck", "brg_int", "scif_clk";
656 dma-names = "tx", "rx", "tx", "rx";
657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
658 resets = <&cpg 520>;
663 compatible = "renesas,hscif-r8a77965",
664 "renesas,rcar-gen3-hscif",
671 clock-names = "fck", "brg_int", "scif_clk";
674 dma-names = "tx", "rx", "tx", "rx";
675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
676 resets = <&cpg 519>;
681 compatible = "renesas,hscif-r8a77965",
682 "renesas,rcar-gen3-hscif",
689 clock-names = "fck", "brg_int", "scif_clk";
692 dma-names = "tx", "rx", "tx", "rx";
693 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
694 resets = <&cpg 518>;
699 compatible = "renesas,hscif-r8a77965",
700 "renesas,rcar-gen3-hscif",
707 clock-names = "fck", "brg_int", "scif_clk";
709 dma-names = "tx", "rx";
710 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
711 resets = <&cpg 517>;
716 compatible = "renesas,hscif-r8a77965",
717 "renesas,rcar-gen3-hscif",
724 clock-names = "fck", "brg_int", "scif_clk";
726 dma-names = "tx", "rx";
727 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
728 resets = <&cpg 516>;
733 compatible = "renesas,usbhs-r8a77965",
734 "renesas,rcar-gen3-usbhs";
740 dma-names = "ch0", "ch1", "ch2", "ch3";
743 phy-names = "usb";
744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
745 resets = <&cpg 704>, <&cpg 703>;
749 usb_dmac0: dma-controller@e65a0000 {
750 compatible = "renesas,r8a77965-usb-dmac",
751 "renesas,usb-dmac";
755 interrupt-names = "ch0", "ch1";
757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
758 resets = <&cpg 330>;
759 #dma-cells = <1>;
760 dma-channels = <2>;
763 usb_dmac1: dma-controller@e65b0000 {
764 compatible = "renesas,r8a77965-usb-dmac",
765 "renesas,usb-dmac";
769 interrupt-names = "ch0", "ch1";
771 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
772 resets = <&cpg 331>;
773 #dma-cells = <1>;
774 dma-channels = <2>;
777 usb3_phy0: usb-phy@e65ee000 {
778 compatible = "renesas,r8a77965-usb3-phy",
779 "renesas,rcar-gen3-usb3-phy";
783 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
785 resets = <&cpg 328>;
786 #phy-cells = <0>;
791 compatible = "arm,cryptocell-630p-ree";
795 resets = <&cpg 229>;
796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
799 dmac0: dma-controller@e6700000 {
800 compatible = "renesas,dmac-r8a77965",
801 "renesas,rcar-dmac";
820 interrupt-names = "error",
826 clock-names = "fck";
827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
828 resets = <&cpg 219>;
829 #dma-cells = <1>;
830 dma-channels = <16>;
841 dmac1: dma-controller@e7300000 {
842 compatible = "renesas,dmac-r8a77965",
843 "renesas,rcar-dmac";
862 interrupt-names = "error",
868 clock-names = "fck";
869 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
870 resets = <&cpg 218>;
871 #dma-cells = <1>;
872 dma-channels = <16>;
883 dmac2: dma-controller@e7310000 {
884 compatible = "renesas,dmac-r8a77965",
885 "renesas,rcar-dmac";
904 interrupt-names = "error",
910 clock-names = "fck";
911 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
912 resets = <&cpg 217>;
913 #dma-cells = <1>;
914 dma-channels = <16>;
926 compatible = "renesas,ipmmu-r8a77965";
928 renesas,ipmmu-main = <&ipmmu_mm 0>;
929 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
930 #iommu-cells = <1>;
934 compatible = "renesas,ipmmu-r8a77965";
936 renesas,ipmmu-main = <&ipmmu_mm 1>;
937 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
938 #iommu-cells = <1>;
942 compatible = "renesas,ipmmu-r8a77965";
944 renesas,ipmmu-main = <&ipmmu_mm 2>;
945 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
946 #iommu-cells = <1>;
950 compatible = "renesas,ipmmu-r8a77965";
954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
955 #iommu-cells = <1>;
959 compatible = "renesas,ipmmu-r8a77965";
961 renesas,ipmmu-main = <&ipmmu_mm 4>;
962 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
963 #iommu-cells = <1>;
967 compatible = "renesas,ipmmu-r8a77965";
969 renesas,ipmmu-main = <&ipmmu_mm 6>;
970 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
971 #iommu-cells = <1>;
975 compatible = "renesas,ipmmu-r8a77965";
977 renesas,ipmmu-main = <&ipmmu_mm 10>;
978 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
979 #iommu-cells = <1>;
983 compatible = "renesas,ipmmu-r8a77965";
985 renesas,ipmmu-main = <&ipmmu_mm 12>;
986 power-domains = <&sysc R8A77965_PD_A3VC>;
987 #iommu-cells = <1>;
991 compatible = "renesas,ipmmu-r8a77965";
993 renesas,ipmmu-main = <&ipmmu_mm 14>;
994 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
995 #iommu-cells = <1>;
999 compatible = "renesas,ipmmu-r8a77965";
1001 renesas,ipmmu-main = <&ipmmu_mm 16>;
1002 power-domains = <&sysc R8A77965_PD_A3VP>;
1003 #iommu-cells = <1>;
1007 compatible = "renesas,etheravb-r8a77965",
1008 "renesas,etheravb-rcar-gen3";
1035 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1043 clock-names = "fck";
1044 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1045 resets = <&cpg 812>;
1046 phy-mode = "rgmii";
1047 rx-internal-delay-ps = <0>;
1048 tx-internal-delay-ps = <0>;
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1056 compatible = "renesas,can-r8a77965",
1057 "renesas,rcar-gen3-can";
1063 clock-names = "clkp1", "clkp2", "can_clk";
1064 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1065 assigned-clock-rates = <40000000>;
1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1067 resets = <&cpg 916>;
1072 compatible = "renesas,can-r8a77965",
1073 "renesas,rcar-gen3-can";
1079 clock-names = "clkp1", "clkp2", "can_clk";
1080 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1081 assigned-clock-rates = <40000000>;
1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1083 resets = <&cpg 915>;
1088 compatible = "renesas,r8a77965-canfd",
1089 "renesas,rcar-gen3-canfd";
1093 interrupt-names = "ch_int", "g_int";
1097 clock-names = "fck", "canfd", "can_clk";
1098 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1099 assigned-clock-rates = <40000000>;
1100 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1101 resets = <&cpg 914>;
1114 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1116 #pwm-cells = <2>;
1118 resets = <&cpg 523>;
1119 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1124 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1126 #pwm-cells = <2>;
1128 resets = <&cpg 523>;
1129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1134 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1136 #pwm-cells = <2>;
1138 resets = <&cpg 523>;
1139 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1144 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1146 #pwm-cells = <2>;
1148 resets = <&cpg 523>;
1149 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1154 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1156 #pwm-cells = <2>;
1158 resets = <&cpg 523>;
1159 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1164 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1166 #pwm-cells = <2>;
1168 resets = <&cpg 523>;
1169 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1174 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1176 #pwm-cells = <2>;
1178 resets = <&cpg 523>;
1179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1184 compatible = "renesas,scif-r8a77965",
1185 "renesas,rcar-gen3-scif", "renesas,scif";
1191 clock-names = "fck", "brg_int", "scif_clk";
1194 dma-names = "tx", "rx", "tx", "rx";
1195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1196 resets = <&cpg 207>;
1201 compatible = "renesas,scif-r8a77965",
1202 "renesas,rcar-gen3-scif", "renesas,scif";
1208 clock-names = "fck", "brg_int", "scif_clk";
1211 dma-names = "tx", "rx", "tx", "rx";
1212 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1213 resets = <&cpg 206>;
1218 compatible = "renesas,scif-r8a77965",
1219 "renesas,rcar-gen3-scif", "renesas,scif";
1225 clock-names = "fck", "brg_int", "scif_clk";
1228 dma-names = "tx", "rx", "tx", "rx";
1229 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1230 resets = <&cpg 310>;
1235 compatible = "renesas,scif-r8a77965",
1236 "renesas,rcar-gen3-scif", "renesas,scif";
1242 clock-names = "fck", "brg_int", "scif_clk";
1244 dma-names = "tx", "rx";
1245 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1246 resets = <&cpg 204>;
1251 compatible = "renesas,scif-r8a77965",
1252 "renesas,rcar-gen3-scif", "renesas,scif";
1258 clock-names = "fck", "brg_int", "scif_clk";
1260 dma-names = "tx", "rx";
1261 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1262 resets = <&cpg 203>;
1267 compatible = "renesas,scif-r8a77965",
1268 "renesas,rcar-gen3-scif", "renesas,scif";
1274 clock-names = "fck", "brg_int", "scif_clk";
1277 dma-names = "tx", "rx", "tx", "rx";
1278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1279 resets = <&cpg 202>;
1284 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1288 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1289 resets = <&cpg 304>;
1290 #pwm-cells = <3>;
1295 compatible = "renesas,msiof-r8a77965",
1296 "renesas,rcar-gen3-msiof";
1302 dma-names = "tx", "rx", "tx", "rx";
1303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1304 resets = <&cpg 211>;
1305 #address-cells = <1>;
1306 #size-cells = <0>;
1311 compatible = "renesas,msiof-r8a77965",
1312 "renesas,rcar-gen3-msiof";
1318 dma-names = "tx", "rx", "tx", "rx";
1319 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1320 resets = <&cpg 210>;
1321 #address-cells = <1>;
1322 #size-cells = <0>;
1327 compatible = "renesas,msiof-r8a77965",
1328 "renesas,rcar-gen3-msiof";
1333 dma-names = "tx", "rx";
1334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1335 resets = <&cpg 209>;
1336 #address-cells = <1>;
1337 #size-cells = <0>;
1342 compatible = "renesas,msiof-r8a77965",
1343 "renesas,rcar-gen3-msiof";
1348 dma-names = "tx", "rx";
1349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1350 resets = <&cpg 208>;
1351 #address-cells = <1>;
1352 #size-cells = <0>;
1357 compatible = "renesas,vin-r8a77965";
1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1362 resets = <&cpg 811>;
1367 #address-cells = <1>;
1368 #size-cells = <0>;
1371 #address-cells = <1>;
1372 #size-cells = <0>;
1378 remote-endpoint = <&csi20vin0>;
1382 remote-endpoint = <&csi40vin0>;
1389 compatible = "renesas,vin-r8a77965";
1393 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1394 resets = <&cpg 810>;
1399 #address-cells = <1>;
1400 #size-cells = <0>;
1403 #address-cells = <1>;
1404 #size-cells = <0>;
1410 remote-endpoint = <&csi20vin1>;
1414 remote-endpoint = <&csi40vin1>;
1421 compatible = "renesas,vin-r8a77965";
1425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1426 resets = <&cpg 809>;
1431 #address-cells = <1>;
1432 #size-cells = <0>;
1435 #address-cells = <1>;
1436 #size-cells = <0>;
1442 remote-endpoint = <&csi20vin2>;
1446 remote-endpoint = <&csi40vin2>;
1453 compatible = "renesas,vin-r8a77965";
1457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1458 resets = <&cpg 808>;
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1467 #address-cells = <1>;
1468 #size-cells = <0>;
1474 remote-endpoint = <&csi20vin3>;
1478 remote-endpoint = <&csi40vin3>;
1485 compatible = "renesas,vin-r8a77965";
1489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1490 resets = <&cpg 807>;
1495 #address-cells = <1>;
1496 #size-cells = <0>;
1499 #address-cells = <1>;
1500 #size-cells = <0>;
1506 remote-endpoint = <&csi20vin4>;
1510 remote-endpoint = <&csi40vin4>;
1517 compatible = "renesas,vin-r8a77965";
1521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1522 resets = <&cpg 806>;
1527 #address-cells = <1>;
1528 #size-cells = <0>;
1531 #address-cells = <1>;
1532 #size-cells = <0>;
1538 remote-endpoint = <&csi20vin5>;
1542 remote-endpoint = <&csi40vin5>;
1549 compatible = "renesas,vin-r8a77965";
1553 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1554 resets = <&cpg 805>;
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1563 #address-cells = <1>;
1564 #size-cells = <0>;
1570 remote-endpoint = <&csi20vin6>;
1574 remote-endpoint = <&csi40vin6>;
1581 compatible = "renesas,vin-r8a77965";
1585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1586 resets = <&cpg 804>;
1591 #address-cells = <1>;
1592 #size-cells = <0>;
1595 #address-cells = <1>;
1596 #size-cells = <0>;
1602 remote-endpoint = <&csi20vin7>;
1606 remote-endpoint = <&csi40vin7>;
1613 compatible = "renesas,r8a77965-drif",
1614 "renesas,rcar-gen3-drif";
1618 clock-names = "fck";
1620 dma-names = "rx", "rx";
1621 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1622 resets = <&cpg 515>;
1628 compatible = "renesas,r8a77965-drif",
1629 "renesas,rcar-gen3-drif";
1633 clock-names = "fck";
1635 dma-names = "rx", "rx";
1636 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1637 resets = <&cpg 514>;
1643 compatible = "renesas,r8a77965-drif",
1644 "renesas,rcar-gen3-drif";
1648 clock-names = "fck";
1650 dma-names = "rx", "rx";
1651 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1652 resets = <&cpg 513>;
1658 compatible = "renesas,r8a77965-drif",
1659 "renesas,rcar-gen3-drif";
1663 clock-names = "fck";
1665 dma-names = "rx", "rx";
1666 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1667 resets = <&cpg 512>;
1673 compatible = "renesas,r8a77965-drif",
1674 "renesas,rcar-gen3-drif";
1678 clock-names = "fck";
1680 dma-names = "rx", "rx";
1681 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1682 resets = <&cpg 511>;
1688 compatible = "renesas,r8a77965-drif",
1689 "renesas,rcar-gen3-drif";
1693 clock-names = "fck";
1695 dma-names = "rx", "rx";
1696 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1697 resets = <&cpg 510>;
1703 compatible = "renesas,r8a77965-drif",
1704 "renesas,rcar-gen3-drif";
1708 clock-names = "fck";
1710 dma-names = "rx", "rx";
1711 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1712 resets = <&cpg 509>;
1718 compatible = "renesas,r8a77965-drif",
1719 "renesas,rcar-gen3-drif";
1723 clock-names = "fck";
1725 dma-names = "rx", "rx";
1726 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1727 resets = <&cpg 508>;
1734 * #sound-dai-cells is required if simple-card
1736 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1737 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1740 * #clock-cells is required for audio_clkout0/1/2/3
1742 * clkout : #clock-cells = <0>; <&rcar_sound>;
1743 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1745 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1751 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1770 clock-names = "ssi-all",
1781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1782 resets = <&cpg 1005>,
1788 reset-names = "ssi-all",
1795 dvc0: dvc-0 {
1797 dma-names = "tx";
1799 dvc1: dvc-1 {
1801 dma-names = "tx";
1806 mix0: mix-0 { };
1807 mix1: mix-1 { };
1811 ctu00: ctu-0 { };
1812 ctu01: ctu-1 { };
1813 ctu02: ctu-2 { };
1814 ctu03: ctu-3 { };
1815 ctu10: ctu-4 { };
1816 ctu11: ctu-5 { };
1817 ctu12: ctu-6 { };
1818 ctu13: ctu-7 { };
1822 src0: src-0 {
1825 dma-names = "rx", "tx";
1827 src1: src-1 {
1830 dma-names = "rx", "tx";
1832 src2: src-2 {
1835 dma-names = "rx", "tx";
1837 src3: src-3 {
1840 dma-names = "rx", "tx";
1842 src4: src-4 {
1845 dma-names = "rx", "tx";
1847 src5: src-5 {
1850 dma-names = "rx", "tx";
1852 src6: src-6 {
1855 dma-names = "rx", "tx";
1857 src7: src-7 {
1860 dma-names = "rx", "tx";
1862 src8: src-8 {
1865 dma-names = "rx", "tx";
1867 src9: src-9 {
1870 dma-names = "rx", "tx";
1875 ssiu00: ssiu-0 {
1877 dma-names = "rx", "tx";
1879 ssiu01: ssiu-1 {
1881 dma-names = "rx", "tx";
1883 ssiu02: ssiu-2 {
1885 dma-names = "rx", "tx";
1887 ssiu03: ssiu-3 {
1889 dma-names = "rx", "tx";
1891 ssiu04: ssiu-4 {
1893 dma-names = "rx", "tx";
1895 ssiu05: ssiu-5 {
1897 dma-names = "rx", "tx";
1899 ssiu06: ssiu-6 {
1901 dma-names = "rx", "tx";
1903 ssiu07: ssiu-7 {
1905 dma-names = "rx", "tx";
1907 ssiu10: ssiu-8 {
1909 dma-names = "rx", "tx";
1911 ssiu11: ssiu-9 {
1913 dma-names = "rx", "tx";
1915 ssiu12: ssiu-10 {
1917 dma-names = "rx", "tx";
1919 ssiu13: ssiu-11 {
1921 dma-names = "rx", "tx";
1923 ssiu14: ssiu-12 {
1925 dma-names = "rx", "tx";
1927 ssiu15: ssiu-13 {
1929 dma-names = "rx", "tx";
1931 ssiu16: ssiu-14 {
1933 dma-names = "rx", "tx";
1935 ssiu17: ssiu-15 {
1937 dma-names = "rx", "tx";
1939 ssiu20: ssiu-16 {
1941 dma-names = "rx", "tx";
1943 ssiu21: ssiu-17 {
1945 dma-names = "rx", "tx";
1947 ssiu22: ssiu-18 {
1949 dma-names = "rx", "tx";
1951 ssiu23: ssiu-19 {
1953 dma-names = "rx", "tx";
1955 ssiu24: ssiu-20 {
1957 dma-names = "rx", "tx";
1959 ssiu25: ssiu-21 {
1961 dma-names = "rx", "tx";
1963 ssiu26: ssiu-22 {
1965 dma-names = "rx", "tx";
1967 ssiu27: ssiu-23 {
1969 dma-names = "rx", "tx";
1971 ssiu30: ssiu-24 {
1973 dma-names = "rx", "tx";
1975 ssiu31: ssiu-25 {
1977 dma-names = "rx", "tx";
1979 ssiu32: ssiu-26 {
1981 dma-names = "rx", "tx";
1983 ssiu33: ssiu-27 {
1985 dma-names = "rx", "tx";
1987 ssiu34: ssiu-28 {
1989 dma-names = "rx", "tx";
1991 ssiu35: ssiu-29 {
1993 dma-names = "rx", "tx";
1995 ssiu36: ssiu-30 {
1997 dma-names = "rx", "tx";
1999 ssiu37: ssiu-31 {
2001 dma-names = "rx", "tx";
2003 ssiu40: ssiu-32 {
2005 dma-names = "rx", "tx";
2007 ssiu41: ssiu-33 {
2009 dma-names = "rx", "tx";
2011 ssiu42: ssiu-34 {
2013 dma-names = "rx", "tx";
2015 ssiu43: ssiu-35 {
2017 dma-names = "rx", "tx";
2019 ssiu44: ssiu-36 {
2021 dma-names = "rx", "tx";
2023 ssiu45: ssiu-37 {
2025 dma-names = "rx", "tx";
2027 ssiu46: ssiu-38 {
2029 dma-names = "rx", "tx";
2031 ssiu47: ssiu-39 {
2033 dma-names = "rx", "tx";
2035 ssiu50: ssiu-40 {
2037 dma-names = "rx", "tx";
2039 ssiu60: ssiu-41 {
2041 dma-names = "rx", "tx";
2043 ssiu70: ssiu-42 {
2045 dma-names = "rx", "tx";
2047 ssiu80: ssiu-43 {
2049 dma-names = "rx", "tx";
2051 ssiu90: ssiu-44 {
2053 dma-names = "rx", "tx";
2055 ssiu91: ssiu-45 {
2057 dma-names = "rx", "tx";
2059 ssiu92: ssiu-46 {
2061 dma-names = "rx", "tx";
2063 ssiu93: ssiu-47 {
2065 dma-names = "rx", "tx";
2067 ssiu94: ssiu-48 {
2069 dma-names = "rx", "tx";
2071 ssiu95: ssiu-49 {
2073 dma-names = "rx", "tx";
2075 ssiu96: ssiu-50 {
2077 dma-names = "rx", "tx";
2079 ssiu97: ssiu-51 {
2081 dma-names = "rx", "tx";
2086 ssi0: ssi-0 {
2089 dma-names = "rx", "tx";
2091 ssi1: ssi-1 {
2094 dma-names = "rx", "tx";
2096 ssi2: ssi-2 {
2099 dma-names = "rx", "tx";
2101 ssi3: ssi-3 {
2104 dma-names = "rx", "tx";
2106 ssi4: ssi-4 {
2109 dma-names = "rx", "tx";
2111 ssi5: ssi-5 {
2114 dma-names = "rx", "tx";
2116 ssi6: ssi-6 {
2119 dma-names = "rx", "tx";
2121 ssi7: ssi-7 {
2124 dma-names = "rx", "tx";
2126 ssi8: ssi-8 {
2129 dma-names = "rx", "tx";
2131 ssi9: ssi-9 {
2134 dma-names = "rx", "tx";
2140 compatible = "renesas,r8a77965-mlp",
2141 "renesas,rcar-gen3-mlp";
2146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2147 resets = <&cpg 802>;
2151 audma0: dma-controller@ec700000 {
2152 compatible = "renesas,dmac-r8a77965",
2153 "renesas,rcar-dmac";
2172 interrupt-names = "error",
2178 clock-names = "fck";
2179 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2180 resets = <&cpg 502>;
2181 #dma-cells = <1>;
2182 dma-channels = <16>;
2185 audma1: dma-controller@ec720000 {
2186 compatible = "renesas,dmac-r8a77965",
2187 "renesas,rcar-dmac";
2206 interrupt-names = "error",
2212 clock-names = "fck";
2213 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2214 resets = <&cpg 501>;
2215 #dma-cells = <1>;
2216 dma-channels = <16>;
2220 compatible = "renesas,xhci-r8a77965",
2221 "renesas,rcar-gen3-xhci";
2225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2226 resets = <&cpg 328>;
2231 compatible = "renesas,r8a77965-usb3-peri",
2232 "renesas,rcar-gen3-usb3-peri";
2236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2237 resets = <&cpg 328>;
2242 compatible = "generic-ohci";
2247 phy-names = "usb";
2248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2249 resets = <&cpg 703>, <&cpg 704>;
2254 compatible = "generic-ohci";
2259 phy-names = "usb";
2260 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2261 resets = <&cpg 702>;
2266 compatible = "generic-ehci";
2271 phy-names = "usb";
2273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2274 resets = <&cpg 703>, <&cpg 704>;
2279 compatible = "generic-ehci";
2284 phy-names = "usb";
2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2287 resets = <&cpg 702>;
2291 usb2_phy0: usb-phy@ee080200 {
2292 compatible = "renesas,usb2-phy-r8a77965",
2293 "renesas,rcar-gen3-usb2-phy";
2297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2298 resets = <&cpg 703>, <&cpg 704>;
2299 #phy-cells = <1>;
2303 usb2_phy1: usb-phy@ee0a0200 {
2304 compatible = "renesas,usb2-phy-r8a77965",
2305 "renesas,rcar-gen3-usb2-phy";
2308 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2309 resets = <&cpg 702>;
2310 #phy-cells = <1>;
2315 compatible = "renesas,sdhi-r8a77965",
2316 "renesas,rcar-gen3-sdhi";
2320 clock-names = "core", "clkh";
2321 max-frequency = <200000000>;
2322 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2323 resets = <&cpg 314>;
2329 compatible = "renesas,sdhi-r8a77965",
2330 "renesas,rcar-gen3-sdhi";
2334 clock-names = "core", "clkh";
2335 max-frequency = <200000000>;
2336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2337 resets = <&cpg 313>;
2343 compatible = "renesas,sdhi-r8a77965",
2344 "renesas,rcar-gen3-sdhi";
2348 clock-names = "core", "clkh";
2349 max-frequency = <200000000>;
2350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2351 resets = <&cpg 312>;
2357 compatible = "renesas,sdhi-r8a77965",
2358 "renesas,rcar-gen3-sdhi";
2362 clock-names = "core", "clkh";
2363 max-frequency = <200000000>;
2364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2365 resets = <&cpg 311>;
2371 compatible = "renesas,r8a77965-rpc-if",
2372 "renesas,rcar-gen3-rpc-if";
2376 reg-names = "regs", "dirmap", "wbuf";
2379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2380 resets = <&cpg 917>;
2381 #address-cells = <1>;
2382 #size-cells = <0>;
2387 compatible = "renesas,sata-r8a77965",
2388 "renesas,rcar-gen3-sata";
2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2393 resets = <&cpg 815>;
2397 gic: interrupt-controller@f1010000 {
2398 compatible = "arm,gic-400";
2399 #interrupt-cells = <3>;
2400 #address-cells = <0>;
2401 interrupt-controller;
2409 clock-names = "clk";
2410 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2411 resets = <&cpg 408>;
2415 compatible = "renesas,pcie-r8a77965",
2416 "renesas,pcie-rcar-gen3";
2418 #address-cells = <3>;
2419 #size-cells = <2>;
2420 bus-range = <0x00 0xff>;
2427 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2431 #interrupt-cells = <1>;
2432 interrupt-map-mask = <0 0 0 0>;
2433 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2435 clock-names = "pcie", "pcie_bus";
2436 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2437 resets = <&cpg 319>;
2438 iommu-map = <0 &ipmmu_hc 0 1>;
2439 iommu-map-mask = <0>;
2444 compatible = "renesas,pcie-r8a77965",
2445 "renesas,pcie-rcar-gen3";
2447 #address-cells = <3>;
2448 #size-cells = <2>;
2449 bus-range = <0x00 0xff>;
2456 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2460 #interrupt-cells = <1>;
2461 interrupt-map-mask = <0 0 0 0>;
2462 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2464 clock-names = "pcie", "pcie_bus";
2465 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2466 resets = <&cpg 318>;
2467 iommu-map = <0 &ipmmu_hc 1 1>;
2468 iommu-map-mask = <0>;
2477 power-domains = <&sysc R8A77965_PD_A3VP>;
2478 resets = <&cpg 119>;
2486 power-domains = <&sysc R8A77965_PD_A3VP>;
2487 resets = <&cpg 615>;
2495 power-domains = <&sysc R8A77965_PD_A3VP>;
2496 resets = <&cpg 626>;
2506 power-domains = <&sysc R8A77965_PD_A3VP>;
2507 resets = <&cpg 631>;
2517 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2518 resets = <&cpg 623>;
2528 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2529 resets = <&cpg 622>;
2538 power-domains = <&sysc R8A77965_PD_A3VP>;
2539 resets = <&cpg 607>;
2546 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2547 resets = <&cpg 603>;
2554 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2555 resets = <&cpg 602>;
2562 power-domains = <&sysc R8A77965_PD_A3VP>;
2563 resets = <&cpg 611>;
2567 compatible = "renesas,r8a77965-cmm",
2568 "renesas,rcar-gen3-cmm";
2570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2572 resets = <&cpg 711>;
2576 compatible = "renesas,r8a77965-cmm",
2577 "renesas,rcar-gen3-cmm";
2579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2581 resets = <&cpg 710>;
2585 compatible = "renesas,r8a77965-cmm",
2586 "renesas,rcar-gen3-cmm";
2588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2590 resets = <&cpg 708>;
2594 compatible = "renesas,r8a77965-csi2";
2598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2599 resets = <&cpg 714>;
2603 #address-cells = <1>;
2604 #size-cells = <0>;
2611 #address-cells = <1>;
2612 #size-cells = <0>;
2618 remote-endpoint = <&vin0csi20>;
2622 remote-endpoint = <&vin1csi20>;
2626 remote-endpoint = <&vin2csi20>;
2630 remote-endpoint = <&vin3csi20>;
2634 remote-endpoint = <&vin4csi20>;
2638 remote-endpoint = <&vin5csi20>;
2642 remote-endpoint = <&vin6csi20>;
2646 remote-endpoint = <&vin7csi20>;
2653 compatible = "renesas,r8a77965-csi2";
2657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2658 resets = <&cpg 716>;
2662 #address-cells = <1>;
2663 #size-cells = <0>;
2670 #address-cells = <1>;
2671 #size-cells = <0>;
2677 remote-endpoint = <&vin0csi40>;
2681 remote-endpoint = <&vin1csi40>;
2685 remote-endpoint = <&vin2csi40>;
2689 remote-endpoint = <&vin3csi40>;
2693 remote-endpoint = <&vin4csi40>;
2697 remote-endpoint = <&vin5csi40>;
2701 remote-endpoint = <&vin6csi40>;
2705 remote-endpoint = <&vin7csi40>;
2712 compatible = "renesas,r8a77965-hdmi",
2713 "renesas,rcar-gen3-hdmi";
2718 clock-names = "iahb", "isfr";
2719 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2720 resets = <&cpg 729>;
2724 #address-cells = <1>;
2725 #size-cells = <0>;
2729 remote-endpoint = <&du_out_hdmi0>;
2739 compatible = "renesas,du-r8a77965";
2746 clock-names = "du.0", "du.1", "du.3";
2747 resets = <&cpg 724>, <&cpg 722>;
2748 reset-names = "du.0", "du.3";
2756 #address-cells = <1>;
2757 #size-cells = <0>;
2765 remote-endpoint = <&dw_hdmi0_in>;
2771 remote-endpoint = <&lvds0_in>;
2778 compatible = "renesas,r8a77965-lvds";
2781 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2782 resets = <&cpg 727>;
2786 #address-cells = <1>;
2787 #size-cells = <0>;
2792 remote-endpoint = <&du_out_lvds0>;
2807 thermal-zones {
2808 sensor1_thermal: sensor1-thermal {
2809 polling-delay-passive = <250>;
2810 polling-delay = <1000>;
2811 thermal-sensors = <&tsc 0>;
2812 sustainable-power = <2439>;
2815 sensor1_crit: sensor1-crit {
2823 sensor2_thermal: sensor2-thermal {
2824 polling-delay-passive = <250>;
2825 polling-delay = <1000>;
2826 thermal-sensors = <&tsc 1>;
2827 sustainable-power = <2439>;
2830 sensor2_crit: sensor2-crit {
2838 sensor3_thermal: sensor3-thermal {
2839 polling-delay-passive = <250>;
2840 polling-delay = <1000>;
2841 thermal-sensors = <&tsc 2>;
2842 sustainable-power = <2439>;
2845 target: trip-point1 {
2852 sensor3_crit: sensor3-crit {
2859 cooling-maps {
2862 cooling-device = <&a57_0 2 4>;
2870 compatible = "arm,armv8-timer";
2871 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2877 /* External USB clocks - can be overridden by the board */
2879 compatible = "fixed-clock";
2880 #clock-cells = <0>;
2881 clock-frequency = <0>;
2885 compatible = "fixed-clock";
2886 #clock-cells = <0>;
2887 clock-frequency = <0>;