Lines Matching +full:0 +full:xee120000
25 * The external audio clocks are configured as 0 Hz fixed frequency
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
54 cluster0_opp: opp-table-0 {
110 #size-cells = <0>;
144 a57_0: cpu@0 {
146 reg = <0x0>;
161 reg = <0x1>;
175 reg = <0x2>;
189 reg = <0x3>;
203 reg = <0x100>;
218 reg = <0x101>;
231 reg = <0x102>;
244 reg = <0x103>;
255 L2_CA57: cache-controller-0 {
272 CPU_SLEEP_0: cpu-sleep-0 {
274 arm,psci-suspend-param = <0x0010000>;
283 arm,psci-suspend-param = <0x0010000>;
294 #clock-cells = <0>;
296 clock-frequency = <0>;
301 #clock-cells = <0>;
303 clock-frequency = <0>;
309 #clock-cells = <0>;
310 clock-frequency = <0>;
345 #clock-cells = <0>;
346 clock-frequency = <0>;
359 reg = <0 0xe6020000 0 0x0c>;
370 reg = <0 0xe6050000 0 0x50>;
374 gpio-ranges = <&pfc 0 0 16>;
385 reg = <0 0xe6051000 0 0x50>;
389 gpio-ranges = <&pfc 0 32 29>;
400 reg = <0 0xe6052000 0 0x50>;
404 gpio-ranges = <&pfc 0 64 15>;
415 reg = <0 0xe6053000 0 0x50>;
419 gpio-ranges = <&pfc 0 96 16>;
430 reg = <0 0xe6054000 0 0x50>;
434 gpio-ranges = <&pfc 0 128 18>;
445 reg = <0 0xe6055000 0 0x50>;
449 gpio-ranges = <&pfc 0 160 26>;
460 reg = <0 0xe6055400 0 0x50>;
464 gpio-ranges = <&pfc 0 192 32>;
475 reg = <0 0xe6055800 0 0x50>;
479 gpio-ranges = <&pfc 0 224 4>;
489 reg = <0 0xe6060000 0 0x50c>;
495 reg = <0 0xe60f0000 0 0x1004>;
508 reg = <0 0xe6130000 0 0x1004>;
527 reg = <0 0xe6140000 0 0x1004>;
546 reg = <0 0xe6148000 0 0x1004>;
564 reg = <0 0xe6150000 0 0x1000>;
568 #power-domain-cells = <0>;
574 reg = <0 0xe6160000 0 0x0200>;
579 reg = <0 0xe6180000 0 0x0400>;
585 reg = <0 0xe6198000 0 0x100>,
586 <0 0xe61a0000 0 0x100>,
587 <0 0xe61a8000 0 0x100>;
601 reg = <0 0xe61c0000 0 0x200>;
602 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
615 reg = <0 0xe61e0000 0 0x30>;
628 reg = <0 0xe6fc0000 0 0x30>;
641 reg = <0 0xe6fd0000 0 0x30>;
654 reg = <0 0xe6fe0000 0 0x30>;
667 reg = <0 0xffc00000 0 0x30>;
680 #size-cells = <0>;
683 reg = <0 0xe6500000 0 0x40>;
688 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
689 <&dmac2 0x91>, <&dmac2 0x90>;
697 #size-cells = <0>;
700 reg = <0 0xe6508000 0 0x40>;
705 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
706 <&dmac2 0x93>, <&dmac2 0x92>;
714 #size-cells = <0>;
717 reg = <0 0xe6510000 0 0x40>;
722 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
723 <&dmac2 0x95>, <&dmac2 0x94>;
731 #size-cells = <0>;
734 reg = <0 0xe66d0000 0 0x40>;
739 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
747 #size-cells = <0>;
750 reg = <0 0xe66d8000 0 0x40>;
755 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
763 #size-cells = <0>;
766 reg = <0 0xe66e0000 0 0x40>;
771 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
779 #size-cells = <0>;
782 reg = <0 0xe66e8000 0 0x40>;
787 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
795 #size-cells = <0>;
799 reg = <0 0xe60b0000 0 0x425>;
804 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
813 reg = <0 0xe6540000 0 96>;
819 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
820 <&dmac2 0x31>, <&dmac2 0x30>;
831 reg = <0 0xe6550000 0 96>;
837 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
838 <&dmac2 0x33>, <&dmac2 0x32>;
849 reg = <0 0xe6560000 0 96>;
855 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
856 <&dmac2 0x35>, <&dmac2 0x34>;
867 reg = <0 0xe66a0000 0 96>;
873 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
884 reg = <0 0xe66b0000 0 96>;
890 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
900 reg = <0 0xe6590000 0 0x200>;
903 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
904 <&usb_dmac1 0>, <&usb_dmac1 1>;
917 reg = <0 0xe659c000 0 0x200>;
920 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
921 <&usb_dmac3 0>, <&usb_dmac3 1>;
934 reg = <0 0xe65a0000 0 0x100>;
948 reg = <0 0xe65b0000 0 0x100>;
962 reg = <0 0xe6460000 0 0x100>;
976 reg = <0 0xe6470000 0 0x100>;
990 reg = <0 0xe65ee000 0 0x90>;
996 #phy-cells = <0>;
1003 reg = <0x0 0xe6601000 0 0x1000>;
1012 reg = <0 0xe6700000 0 0x10000>;
1041 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1054 reg = <0 0xe7300000 0 0x10000>;
1083 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1096 reg = <0 0xe7310000 0 0x10000>;
1137 reg = <0 0xe6740000 0 0x1000>;
1138 renesas,ipmmu-main = <&ipmmu_mm 0>;
1145 reg = <0 0xe7740000 0 0x1000>;
1153 reg = <0 0xe6570000 0 0x1000>;
1161 reg = <0 0xff8b0000 0 0x1000>;
1169 reg = <0 0xe67b0000 0 0x1000>;
1178 reg = <0 0xec670000 0 0x1000>;
1186 reg = <0 0xfd800000 0 0x1000>;
1194 reg = <0 0xfd950000 0 0x1000>;
1202 reg = <0 0xfd960000 0 0x1000>;
1210 reg = <0 0xfd970000 0 0x1000>;
1218 reg = <0 0xffc80000 0 0x1000>;
1226 reg = <0 0xfe6b0000 0 0x1000>;
1234 reg = <0 0xfe6f0000 0 0x1000>;
1242 reg = <0 0xfebd0000 0 0x1000>;
1250 reg = <0 0xfebe0000 0 0x1000>;
1258 reg = <0 0xfe990000 0 0x1000>;
1266 reg = <0 0xfe980000 0 0x1000>;
1275 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1313 rx-internal-delay-ps = <0>;
1314 tx-internal-delay-ps = <0>;
1317 #size-cells = <0>;
1324 reg = <0 0xe6c30000 0 0x1000>;
1340 reg = <0 0xe6c38000 0 0x1000>;
1356 reg = <0 0xe66c0000 0 0x8000>;
1381 reg = <0 0xe6e30000 0 0x8>;
1391 reg = <0 0xe6e31000 0 0x8>;
1401 reg = <0 0xe6e32000 0 0x8>;
1411 reg = <0 0xe6e33000 0 0x8>;
1421 reg = <0 0xe6e34000 0 0x8>;
1431 reg = <0 0xe6e35000 0 0x8>;
1441 reg = <0 0xe6e36000 0 0x8>;
1452 reg = <0 0xe6e60000 0 64>;
1458 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1459 <&dmac2 0x51>, <&dmac2 0x50>;
1469 reg = <0 0xe6e68000 0 64>;
1475 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1476 <&dmac2 0x53>, <&dmac2 0x52>;
1486 reg = <0 0xe6e88000 0 64>;
1492 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1493 <&dmac2 0x13>, <&dmac2 0x12>;
1503 reg = <0 0xe6c50000 0 64>;
1509 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1519 reg = <0 0xe6c40000 0 64>;
1525 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1535 reg = <0 0xe6f30000 0 64>;
1541 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1542 <&dmac2 0x5b>, <&dmac2 0x5a>;
1551 reg = <0 0xe6e80000 0 0x148>;
1563 reg = <0 0xe6e90000 0 0x0064>;
1566 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1567 <&dmac2 0x41>, <&dmac2 0x40>;
1572 #size-cells = <0>;
1579 reg = <0 0xe6ea0000 0 0x0064>;
1582 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1583 <&dmac2 0x43>, <&dmac2 0x42>;
1588 #size-cells = <0>;
1595 reg = <0 0xe6c00000 0 0x0064>;
1598 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1603 #size-cells = <0>;
1610 reg = <0 0xe6c10000 0 0x0064>;
1613 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1618 #size-cells = <0>;
1624 reg = <0 0xe6ef0000 0 0x1000>;
1629 renesas,id = <0>;
1634 #size-cells = <0>;
1638 #size-cells = <0>;
1642 vin0csi20: endpoint@0 {
1643 reg = <0>;
1656 reg = <0 0xe6ef1000 0 0x1000>;
1666 #size-cells = <0>;
1670 #size-cells = <0>;
1674 vin1csi20: endpoint@0 {
1675 reg = <0>;
1688 reg = <0 0xe6ef2000 0 0x1000>;
1698 #size-cells = <0>;
1702 #size-cells = <0>;
1706 vin2csi20: endpoint@0 {
1707 reg = <0>;
1720 reg = <0 0xe6ef3000 0 0x1000>;
1730 #size-cells = <0>;
1734 #size-cells = <0>;
1738 vin3csi20: endpoint@0 {
1739 reg = <0>;
1752 reg = <0 0xe6ef4000 0 0x1000>;
1762 #size-cells = <0>;
1766 #size-cells = <0>;
1770 vin4csi20: endpoint@0 {
1771 reg = <0>;
1784 reg = <0 0xe6ef5000 0 0x1000>;
1794 #size-cells = <0>;
1798 #size-cells = <0>;
1802 vin5csi20: endpoint@0 {
1803 reg = <0>;
1816 reg = <0 0xe6ef6000 0 0x1000>;
1826 #size-cells = <0>;
1830 #size-cells = <0>;
1834 vin6csi20: endpoint@0 {
1835 reg = <0>;
1848 reg = <0 0xe6ef7000 0 0x1000>;
1858 #size-cells = <0>;
1862 #size-cells = <0>;
1866 vin7csi20: endpoint@0 {
1867 reg = <0>;
1881 reg = <0 0xe6f40000 0 0x64>;
1885 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1896 reg = <0 0xe6f50000 0 0x64>;
1900 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1911 reg = <0 0xe6f60000 0 0x64>;
1915 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1926 reg = <0 0xe6f70000 0 0x64>;
1930 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1941 reg = <0 0xe6f80000 0 0x64>;
1945 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1956 reg = <0 0xe6f90000 0 0x64>;
1960 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1971 reg = <0 0xe6fa0000 0 0x64>;
1975 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1986 reg = <0 0xe6fb0000 0 0x64>;
1990 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
2002 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2008 * clkout : #clock-cells = <0>; <&rcar_sound>;
2012 reg = <0 0xec500000 0 0x1000>, /* SCU */
2013 <0 0xec5a0000 0 0x100>, /* ADG */
2014 <0 0xec540000 0 0x1000>, /* SSIU */
2015 <0 0xec541000 0 0x280>, /* SSI */
2016 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
2039 "ssi.1", "ssi.0",
2042 "src.1", "src.0",
2043 "mix.1", "mix.0",
2044 "ctu.1", "ctu.0",
2045 "dvc.0", "dvc.1",
2057 "ssi.1", "ssi.0";
2061 dvc0: dvc-0 {
2062 dmas = <&audma1 0xbc>;
2066 dmas = <&audma1 0xbe>;
2072 mix0: mix-0 { };
2077 ctu00: ctu-0 { };
2088 src0: src-0 {
2090 dmas = <&audma0 0x85>, <&audma1 0x9a>;
2095 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2100 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2105 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2110 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2115 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2120 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2125 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2130 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2135 dmas = <&audma0 0x97>, <&audma1 0xba>;
2141 ssiu00: ssiu-0 {
2142 dmas = <&audma0 0x15>, <&audma1 0x16>;
2146 dmas = <&audma0 0x35>, <&audma1 0x36>;
2150 dmas = <&audma0 0x37>, <&audma1 0x38>;
2154 dmas = <&audma0 0x47>, <&audma1 0x48>;
2158 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2162 dmas = <&audma0 0x43>, <&audma1 0x44>;
2166 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2170 dmas = <&audma0 0x53>, <&audma1 0x54>;
2174 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2178 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2182 dmas = <&audma0 0x57>, <&audma1 0x58>;
2186 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2190 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2194 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2198 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2202 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2206 dmas = <&audma0 0x63>, <&audma1 0x64>;
2210 dmas = <&audma0 0x67>, <&audma1 0x68>;
2214 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2218 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2222 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2226 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2230 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2234 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2238 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2242 dmas = <&audma0 0x21>, <&audma1 0x22>;
2246 dmas = <&audma0 0x23>, <&audma1 0x24>;
2250 dmas = <&audma0 0x25>, <&audma1 0x26>;
2254 dmas = <&audma0 0x27>, <&audma1 0x28>;
2258 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2262 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2266 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2270 dmas = <&audma0 0x71>, <&audma1 0x72>;
2274 dmas = <&audma0 0x17>, <&audma1 0x18>;
2278 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2282 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2286 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2290 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2294 dmas = <&audma0 0x31>, <&audma1 0x32>;
2298 dmas = <&audma0 0x33>, <&audma1 0x34>;
2302 dmas = <&audma0 0x73>, <&audma1 0x74>;
2306 dmas = <&audma0 0x75>, <&audma1 0x76>;
2310 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2314 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2318 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2322 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2326 dmas = <&audma0 0x81>, <&audma1 0x82>;
2330 dmas = <&audma0 0x83>, <&audma1 0x84>;
2334 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2338 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2342 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2346 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2352 ssi0: ssi-0 {
2354 dmas = <&audma0 0x01>, <&audma1 0x02>;
2359 dmas = <&audma0 0x03>, <&audma1 0x04>;
2364 dmas = <&audma0 0x05>, <&audma1 0x06>;
2369 dmas = <&audma0 0x07>, <&audma1 0x08>;
2374 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2379 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2384 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2389 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2394 dmas = <&audma0 0x11>, <&audma1 0x12>;
2399 dmas = <&audma0 0x13>, <&audma1 0x14>;
2408 reg = <0 0xec520000 0 0x800>;
2420 reg = <0 0xec700000 0 0x10000>;
2449 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2462 reg = <0 0xec720000 0 0x10000>;
2503 reg = <0 0xee000000 0 0xc00>;
2514 reg = <0 0xee020000 0 0x400>;
2524 reg = <0 0xee080000 0 0x100>;
2536 reg = <0 0xee0a0000 0 0x100>;
2548 reg = <0 0xee0c0000 0 0x100>;
2560 reg = <0 0xee0e0000 0 0x100>;
2572 reg = <0 0xee080100 0 0x100>;
2585 reg = <0 0xee0a0100 0 0x100>;
2598 reg = <0 0xee0c0100 0 0x100>;
2611 reg = <0 0xee0e0100 0 0x100>;
2625 reg = <0 0xee080200 0 0x700>;
2637 reg = <0 0xee0a0200 0 0x700>;
2648 reg = <0 0xee0c0200 0 0x700>;
2659 reg = <0 0xee0e0200 0 0x700>;
2671 reg = <0 0xee100000 0 0x2000>;
2685 reg = <0 0xee120000 0 0x2000>;
2699 reg = <0 0xee140000 0 0x2000>;
2713 reg = <0 0xee160000 0 0x2000>;
2727 reg = <0 0xee200000 0 0x200>,
2728 <0 0x08000000 0 0x04000000>,
2729 <0 0xee208000 0 0x100>;
2736 #size-cells = <0>;
2743 reg = <0 0xee300000 0 0x200000>;
2755 #address-cells = <0>;
2757 reg = <0x0 0xf1010000 0 0x1000>,
2758 <0x0 0xf1020000 0 0x20000>,
2759 <0x0 0xf1040000 0 0x20000>,
2760 <0x0 0xf1060000 0 0x20000>;
2772 reg = <0 0xfe000000 0 0x80000>;
2775 bus-range = <0x00 0xff>;
2777 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2778 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2779 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2780 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2782 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2787 interrupt-map-mask = <0 0 0 0>;
2788 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2793 iommu-map = <0 &ipmmu_hc 0 1>;
2794 iommu-map-mask = <0>;
2801 reg = <0 0xee800000 0 0x80000>;
2804 bus-range = <0x00 0xff>;
2806 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2807 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2808 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2809 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2811 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2816 interrupt-map-mask = <0 0 0 0>;
2817 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2822 iommu-map = <0 &ipmmu_hc 1 1>;
2823 iommu-map-mask = <0>;
2830 reg = <0x0 0xfe000000 0 0x80000>,
2831 <0x0 0xfe100000 0 0x100000>,
2832 <0x0 0xfe200000 0 0x200000>,
2833 <0x0 0x30000000 0 0x8000000>,
2834 <0x0 0x38000000 0 0x8000000>;
2849 reg = <0x0 0xee800000 0 0x80000>,
2850 <0x0 0xee900000 0 0x100000>,
2851 <0x0 0xeea00000 0 0x200000>,
2852 <0x0 0xc0000000 0 0x8000000>,
2853 <0x0 0xc8000000 0 0x8000000>;
2868 reg = <0 0xfe860000 0 0x2000>;
2878 reg = <0 0xfe870000 0 0x2000>;
2888 reg = <0 0xfe880000 0 0x2000>;
2898 reg = <0 0xfe890000 0 0x2000>;
2907 reg = <0 0xfe920000 0 0x8000>;
2918 reg = <0 0xfe960000 0 0x8000>;
2929 reg = <0 0xfea20000 0 0x5000>;
2940 reg = <0 0xfea28000 0 0x5000>;
2951 reg = <0 0xfea30000 0 0x5000>;
2962 reg = <0 0xfe9a0000 0 0x8000>;
2973 reg = <0 0xfe9b0000 0 0x8000>;
2984 reg = <0 0xfe940000 0 0x2400>;
2994 reg = <0 0xfe944000 0 0x2400>;
3004 reg = <0 0xfe950000 0 0x200>;
3008 iommus = <&ipmmu_vp0 0>;
3013 reg = <0 0xfe951000 0 0x200>;
3022 reg = <0 0xfe96f000 0 0x200>;
3031 reg = <0 0xfe92f000 0 0x200>;
3040 reg = <0 0xfe9af000 0 0x200>;
3049 reg = <0 0xfe9bf000 0 0x200>;
3058 reg = <0 0xfea27000 0 0x200>;
3067 reg = <0 0xfea2f000 0 0x200>;
3076 reg = <0 0xfea37000 0 0x200>;
3086 reg = <0 0xfea40000 0 0x1000>;
3095 reg = <0 0xfea50000 0 0x1000>;
3104 reg = <0 0xfea60000 0 0x1000>;
3113 reg = <0 0xfea70000 0 0x1000>;
3121 reg = <0 0xfea80000 0 0x10000>;
3130 #size-cells = <0>;
3132 port@0 {
3133 reg = <0>;
3138 #size-cells = <0>;
3142 csi20vin0: endpoint@0 {
3143 reg = <0>;
3180 reg = <0 0xfeaa0000 0 0x10000>;
3189 #size-cells = <0>;
3191 port@0 {
3192 reg = <0>;
3197 #size-cells = <0>;
3201 csi40vin0: endpoint@0 {
3202 reg = <0>;
3223 reg = <0 0xfeab0000 0 0x10000>;
3232 #size-cells = <0>;
3234 port@0 {
3235 reg = <0>;
3240 #size-cells = <0>;
3244 csi41vin4: endpoint@0 {
3245 reg = <0>;
3266 reg = <0 0xfead0000 0 0x10000>;
3276 #size-cells = <0>;
3277 port@0 {
3278 reg = <0>;
3295 reg = <0 0xfeae0000 0 0x10000>;
3305 #size-cells = <0>;
3306 port@0 {
3307 reg = <0>;
3324 reg = <0 0xfeb00000 0 0x80000>;
3331 clock-names = "du.0", "du.1", "du.2", "du.3";
3333 reset-names = "du.0", "du.2";
3336 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3343 #size-cells = <0>;
3345 port@0 {
3346 reg = <0>;
3371 reg = <0 0xfeb90000 0 0x14>;
3379 #size-cells = <0>;
3381 port@0 {
3382 reg = <0>;
3395 reg = <0 0xfff00044 0 4>;
3403 thermal-sensors = <&tsc 0>;
3458 cooling-device = <&a53_0 0 2>;
3476 #clock-cells = <0>;
3477 clock-frequency = <0>;
3482 #clock-cells = <0>;
3483 clock-frequency = <0>;