Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
78 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
89 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
146 clocks = <&cpg CPG_MOD 402>;
148 resets = <&cpg 402>;
162 clocks = <&cpg CPG_MOD 912>;
164 resets = <&cpg 912>;
177 clocks = <&cpg CPG_MOD 911>;
179 resets = <&cpg 911>;
192 clocks = <&cpg CPG_MOD 910>;
194 resets = <&cpg 910>;
207 clocks = <&cpg CPG_MOD 909>;
209 resets = <&cpg 909>;
222 clocks = <&cpg CPG_MOD 908>;
224 resets = <&cpg 908>;
237 clocks = <&cpg CPG_MOD 907>;
239 resets = <&cpg 907>;
252 clocks = <&cpg CPG_MOD 906>;
254 resets = <&cpg 906>;
268 clocks = <&cpg CPG_MOD 303>;
271 resets = <&cpg 303>;
287 clocks = <&cpg CPG_MOD 302>;
290 resets = <&cpg 302>;
306 clocks = <&cpg CPG_MOD 301>;
309 resets = <&cpg 301>;
325 clocks = <&cpg CPG_MOD 300>;
328 resets = <&cpg 300>;
332 cpg: clock-controller@e6150000 { label
333 compatible = "renesas,r8a774c0-cpg-mssr";
359 clocks = <&cpg CPG_MOD 522>;
361 resets = <&cpg 522>;
376 clocks = <&cpg CPG_MOD 407>;
378 resets = <&cpg 407>;
387 clocks = <&cpg CPG_MOD 125>;
390 resets = <&cpg 125>;
400 clocks = <&cpg CPG_MOD 124>;
403 resets = <&cpg 124>;
413 clocks = <&cpg CPG_MOD 123>;
416 resets = <&cpg 123>;
426 clocks = <&cpg CPG_MOD 122>;
429 resets = <&cpg 122>;
439 clocks = <&cpg CPG_MOD 121>;
442 resets = <&cpg 121>;
453 clocks = <&cpg CPG_MOD 931>;
455 resets = <&cpg 931>;
470 clocks = <&cpg CPG_MOD 930>;
472 resets = <&cpg 930>;
487 clocks = <&cpg CPG_MOD 929>;
489 resets = <&cpg 929>;
504 clocks = <&cpg CPG_MOD 928>;
506 resets = <&cpg 928>;
520 clocks = <&cpg CPG_MOD 927>;
522 resets = <&cpg 927>;
536 clocks = <&cpg CPG_MOD 919>;
538 resets = <&cpg 919>;
552 clocks = <&cpg CPG_MOD 918>;
554 resets = <&cpg 918>;
568 clocks = <&cpg CPG_MOD 1003>;
570 resets = <&cpg 1003>;
583 clocks = <&cpg CPG_MOD 926>;
585 resets = <&cpg 926>;
597 clocks = <&cpg CPG_MOD 520>,
598 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
605 resets = <&cpg 520>;
615 clocks = <&cpg CPG_MOD 519>,
616 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
623 resets = <&cpg 519>;
633 clocks = <&cpg CPG_MOD 518>,
634 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
641 resets = <&cpg 518>;
651 clocks = <&cpg CPG_MOD 517>,
652 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
658 resets = <&cpg 517>;
668 clocks = <&cpg CPG_MOD 516>,
669 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
675 resets = <&cpg 516>;
684 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
692 resets = <&cpg 704>, <&cpg 703>;
703 clocks = <&cpg CPG_MOD 330>;
705 resets = <&cpg 330>;
717 clocks = <&cpg CPG_MOD 331>;
719 resets = <&cpg 331>;
750 clocks = <&cpg CPG_MOD 219>;
753 resets = <&cpg 219>;
792 clocks = <&cpg CPG_MOD 218>;
795 resets = <&cpg 218>;
834 clocks = <&cpg CPG_MOD 217>;
837 resets = <&cpg 217>;
959 clocks = <&cpg CPG_MOD 812>;
962 resets = <&cpg 812>;
976 clocks = <&cpg CPG_MOD 916>,
977 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
980 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
983 resets = <&cpg 916>;
992 clocks = <&cpg CPG_MOD 915>,
993 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
996 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
999 resets = <&cpg 915>;
1010 clocks = <&cpg CPG_MOD 914>,
1011 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1014 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1017 resets = <&cpg 914>;
1032 clocks = <&cpg CPG_MOD 523>;
1034 resets = <&cpg 523>;
1042 clocks = <&cpg CPG_MOD 523>;
1044 resets = <&cpg 523>;
1052 clocks = <&cpg CPG_MOD 523>;
1054 resets = <&cpg 523>;
1062 clocks = <&cpg CPG_MOD 523>;
1064 resets = <&cpg 523>;
1072 clocks = <&cpg CPG_MOD 523>;
1074 resets = <&cpg 523>;
1082 clocks = <&cpg CPG_MOD 523>;
1084 resets = <&cpg 523>;
1092 clocks = <&cpg CPG_MOD 523>;
1094 resets = <&cpg 523>;
1104 clocks = <&cpg CPG_MOD 207>,
1105 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1112 resets = <&cpg 207>;
1121 clocks = <&cpg CPG_MOD 206>,
1122 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1129 resets = <&cpg 206>;
1138 clocks = <&cpg CPG_MOD 310>,
1139 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1146 resets = <&cpg 310>;
1155 clocks = <&cpg CPG_MOD 204>,
1156 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1162 resets = <&cpg 204>;
1171 clocks = <&cpg CPG_MOD 203>,
1172 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1178 resets = <&cpg 203>;
1187 clocks = <&cpg CPG_MOD 202>,
1188 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1194 resets = <&cpg 202>;
1203 clocks = <&cpg CPG_MOD 211>;
1208 resets = <&cpg 211>;
1219 clocks = <&cpg CPG_MOD 210>;
1223 resets = <&cpg 210>;
1234 clocks = <&cpg CPG_MOD 209>;
1238 resets = <&cpg 209>;
1249 clocks = <&cpg CPG_MOD 208>;
1253 resets = <&cpg 208>;
1263 clocks = <&cpg CPG_MOD 807>;
1265 resets = <&cpg 807>;
1291 clocks = <&cpg CPG_MOD 806>;
1293 resets = <&cpg 806>;
1337 clocks = <&cpg CPG_MOD 1005>,
1338 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1339 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1340 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1341 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1342 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1343 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1344 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1345 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1346 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1347 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1348 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1349 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1350 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1353 <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1366 resets = <&cpg 1005>,
1367 <&cpg 1006>, <&cpg 1007>,
1368 <&cpg 1008>, <&cpg 1009>,
1369 <&cpg 1010>, <&cpg 1011>,
1370 <&cpg 1012>, <&cpg 1013>,
1371 <&cpg 1014>, <&cpg 1015>;
1548 clocks = <&cpg CPG_MOD 502>;
1551 resets = <&cpg 502>;
1569 clocks = <&cpg CPG_MOD 328>;
1571 resets = <&cpg 328>;
1580 clocks = <&cpg CPG_MOD 328>;
1582 resets = <&cpg 328>;
1590 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1594 resets = <&cpg 703>, <&cpg 704>;
1602 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1607 resets = <&cpg 703>, <&cpg 704>;
1616 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1618 resets = <&cpg 703>, <&cpg 704>;
1628 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1632 resets = <&cpg 314>;
1641 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1645 resets = <&cpg 313>;
1654 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1658 resets = <&cpg 311>;
1670 clocks = <&cpg CPG_MOD 917>;
1672 resets = <&cpg 917>;
1689 clocks = <&cpg CPG_MOD 408>;
1692 resets = <&cpg 408>;
1715 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1718 resets = <&cpg 319>;
1736 clocks = <&cpg CPG_MOD 319>;
1738 resets = <&cpg 319>;
1747 clocks = <&cpg CPG_MOD 626>;
1749 resets = <&cpg 626>;
1757 clocks = <&cpg CPG_MOD 623>;
1759 resets = <&cpg 623>;
1767 clocks = <&cpg CPG_MOD 622>;
1769 resets = <&cpg 622>;
1777 clocks = <&cpg CPG_MOD 631>;
1779 resets = <&cpg 631>;
1786 clocks = <&cpg CPG_MOD 607>;
1788 resets = <&cpg 607>;
1795 clocks = <&cpg CPG_MOD 603>;
1797 resets = <&cpg 603>;
1804 clocks = <&cpg CPG_MOD 602>;
1806 resets = <&cpg 602>;
1813 clocks = <&cpg CPG_MOD 611>;
1815 resets = <&cpg 611>;
1823 clocks = <&cpg CPG_MOD 716>;
1825 resets = <&cpg 716>;
1859 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1861 resets = <&cpg 724>;
1894 clocks = <&cpg CPG_MOD 727>;
1896 resets = <&cpg 727>;
1921 clocks = <&cpg CPG_MOD 727>;
1923 resets = <&cpg 726>;