Lines Matching +full:lvds +full:- +full:decoder

1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board with R-Car V3H
8 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
27 d1_8v: regulator-2 {
28 compatible = "regulator-fixed";
29 regulator-name = "D1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-boot-on;
33 regulator-always-on;
36 d3_3v: regulator-0 {
37 compatible = "regulator-fixed";
38 regulator-name = "D3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 regulator-boot-on;
42 regulator-always-on;
45 hdmi-out {
46 compatible = "hdmi-connector";
51 remote-endpoint = <&adv7511_out>;
56 lvds-decoder {
58 vcc-supply = <&d3_3v>;
61 #address-cells = <1>;
62 #size-cells = <0>;
67 remote-endpoint = <&lvds0_out>;
74 remote-endpoint = <&adv7511_in>;
86 vddq_vin01: regulator-1 {
87 compatible = "regulator-fixed";
88 regulator-name = "VDDQ_VIN01";
89 regulator-min-microvolt = <1800000>;
90 regulator-max-microvolt = <1800000>;
91 regulator-boot-on;
92 regulator-always-on;
95 x1_clk: x1-clock {
96 compatible = "fixed-clock";
97 #clock-cells = <0>;
98 clock-frequency = <148500000>;
103 pinctrl-0 = <&canfd0_pins>;
104 pinctrl-names = "default";
118 clock-lanes = <0>;
119 data-lanes = <1 2 3 4>;
120 remote-endpoint = <&max9286_out0>;
132 clock-lanes = <0>;
133 data-lanes = <1 2 3 4>;
134 remote-endpoint = <&max9286_out1>;
143 clock-names = "du.0", "dclkin.0";
148 clock-frequency = <16666666>;
152 clock-frequency = <32768>;
156 pinctrl-0 = <&gether_pins>;
157 pinctrl-names = "default";
159 phy-mode = "rgmii-id";
160 phy-handle = <&phy0>;
161 renesas,no-ether-link;
164 phy0: ethernet-phy@0 {
165 compatible = "ethernet-phy-id0022.1622",
166 "ethernet-phy-ieee802.3-c22";
167 rxc-skew-ps = <1500>;
169 interrupt-parent = <&gpio4>;
171 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
176 pinctrl-0 = <&i2c0_pins>;
177 pinctrl-names = "default";
180 clock-frequency = <400000>;
185 gpio-controller;
186 #gpio-cells = <2>;
192 gpio-controller;
193 #gpio-cells = <2>;
199 interrupt-parent = <&gpio1>;
201 avdd-supply = <&d1_8v>;
202 dvdd-supply = <&d1_8v>;
203 pvdd-supply = <&d1_8v>;
204 bgvdd-supply = <&d1_8v>;
205 dvdd-3v-supply = <&d3_3v>;
207 adi,input-depth = <8>;
208 adi,input-colorspace = "rgb";
209 adi,input-clock = "1x";
212 #address-cells = <1>;
213 #size-cells = <0>;
218 remote-endpoint = <&thc63lvd1024_out>;
225 remote-endpoint = <&hdmi_con>;
233 pinctrl-0 = <&i2c1_pins>;
234 pinctrl-names = "default";
237 clock-frequency = <400000>;
239 gmsl0: gmsl-deserializer@48 {
243 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
244 enable-gpios = <&io_expander0 0 GPIO_ACTIVE_HIGH>;
247 #address-cells = <1>;
248 #size-cells = <0>;
269 clock-lanes = <0>;
270 data-lanes = <1 2 3 4>;
271 remote-endpoint = <&csi40_in>;
276 i2c-mux {
277 #address-cells = <1>;
278 #size-cells = <0>;
281 #address-cells = <1>;
282 #size-cells = <0>;
289 #address-cells = <1>;
290 #size-cells = <0>;
297 #address-cells = <1>;
298 #size-cells = <0>;
305 #address-cells = <1>;
306 #size-cells = <0>;
314 gmsl1: gmsl-deserializer@4a {
318 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
319 enable-gpios = <&io_expander1 0 GPIO_ACTIVE_HIGH>;
322 #address-cells = <1>;
323 #size-cells = <0>;
344 clock-lanes = <0>;
345 data-lanes = <1 2 3 4>;
346 remote-endpoint = <&csi41_in>;
351 i2c-mux {
352 #address-cells = <1>;
353 #size-cells = <0>;
356 #address-cells = <1>;
357 #size-cells = <0>;
364 #address-cells = <1>;
365 #size-cells = <0>;
372 #address-cells = <1>;
373 #size-cells = <0>;
380 #address-cells = <1>;
381 #size-cells = <0>;
396 remote-endpoint = <&thc63lvd1024_in>;
403 pinctrl-0 = <&mmc_pins>;
404 pinctrl-1 = <&mmc_pins>;
405 pinctrl-names = "default", "state_uhs";
407 vmmc-supply = <&d3_3v>;
408 vqmmc-supply = <&vddq_vin01>;
409 mmc-hs200-1_8v;
410 bus-width = <8>;
411 no-sd;
412 no-sdio;
413 non-removable;
422 clock-frequency = <100000000>;
454 power-source = <1800>;
474 pinctrl-0 = <&qspi0_pins>;
475 pinctrl-names = "default";
480 compatible = "spansion,s25fs512s", "jedec,spi-nor";
482 spi-max-frequency = <50000000>;
483 spi-rx-bus-width = <4>;
486 compatible = "fixed-partitions";
487 #address-cells = <1>;
488 #size-cells = <1>;
492 read-only;
496 read-only;
500 read-only;
504 read-only;
508 read-only;
512 read-only;
516 read-only;
518 uboot-env@700000 {
520 read-only;
536 timeout-sec = <60>;
541 pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
542 pinctrl-names = "default";
548 clock-frequency = <14745600>;