Lines Matching full:rpmcc
9 #include <dt-bindings/clock/qcom,rpmcc.h>
358 rpmcc: clock-controller { label
359 compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc";
790 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>;
802 clocks = <&gcc GCC_AHB2PHY_USB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
815 clocks = <&rpmcc RPM_SMD_CE1_CLK>;
830 clocks = <&rpmcc RPM_SMD_CE1_CLK>;
945 <&rpmcc RPM_SMD_XO_CLK_SRC>,
964 <&rpmcc RPM_SMD_XO_CLK_SRC>;
1011 <&rpmcc RPM_SMD_XO_CLK_SRC>,
1438 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
1648 <&rpmcc RPM_SMD_XO_CLK_SRC>;
1658 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
1681 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
1707 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1725 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1735 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1745 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1755 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1765 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1775 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1785 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1795 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1805 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1815 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1825 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1835 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1845 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1855 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1865 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1875 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1885 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1911 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1937 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1955 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
1981 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2007 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2044 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2065 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2086 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2107 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2128 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2149 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2170 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2191 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2212 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2291 clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
2325 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
2397 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
2650 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;