dts/qcom/sc7180.dtsi

230 			clocks = <&cpufreq_hw 1>;
241 			qcom,freq-domain = <&cpufreq_hw 1>;
254 			clocks = <&cpufreq_hw 1>;
265 			qcom,freq-domain = <&cpufreq_hw 1>;
323 			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
333 			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
343 			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
364 			CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
690 			qcom,client-id = <1>;
714 			#qcom,smem-state-cells = <1>;
738 			#qcom,smem-state-cells = <1>;
755 		qcom,remote-pid = <1>;
759 			#qcom,smem-state-cells = <1>;
770 			#qcom,smem-state-cells = <1>;
794 			#clock-cells = <1>;
795 			#reset-cells = <1>;
796 			#power-domain-cells = <1>;
809 			#address-cells = <1>;
810 			#size-cells = <1>;
814 				bits = <1 3>;
817 			gpu_speed_bin: gpu_speed_bin@1d2 {
848 			mmc-ddr-1_8v;
849 			mmc-hs200-1_8v;
850 			mmc-hs400-1_8v;
894 				#address-cells = <1>;
914 				#address-cells = <1>;
948 				#address-cells = <1>;
968 				#address-cells = <1>;
1002 				#address-cells = <1>;
1038 				#address-cells = <1>;
1058 				#address-cells = <1>;
1092 				#address-cells = <1>;
1128 				#address-cells = <1>;
1148 				#address-cells = <1>;
1195 				#address-cells = <1>;
1215 				#address-cells = <1>;
1249 				#address-cells = <1>;
1285 				#address-cells = <1>;
1305 				#address-cells = <1>;
1339 				#address-cells = <1>;
1375 				#address-cells = <1>;
1395 				#address-cells = <1>;
1429 				#address-cells = <1>;
1449 				#address-cells = <1>;
1532 		ipa: ipa@1e40000 {
1547 					      <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1566 					   <&ipa_smp2p_out 1>;
1573 		tcsr_mutex: hwlock@1f40000 {
1576 			#hwlock-cells = <1>;
1579 		tcsr_regs_1: syscon@1f60000 {
1584 		tcsr_regs_2: syscon@1fc0000 {
2054 					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2081 				qcom,remote-pid = <1>;
2168 			#iommu-cells = <1>;
2225 			#clock-cells = <1>;
2226 			#reset-cells = <1>;
2227 			#power-domain-cells = <1>;
2270 				#address-cells = <1>;
2298 				#address-cells = <1>;
2326 				#address-cells = <1>;
2336 				port@1 {
2337 					reg = <1>;
2403 				#address-cells = <1>;
2640 				#address-cells = <1>;
2650 				port@1 {
2651 					reg = <1>;
2772 			#address-cells = <1>;
2819 			#clock-cells = <1>;
2820 			#phy-cells = <1>;
2839 				opp-1 {
2877 				opp-1 {
3056 			#clock-cells = <1>;
3057 			#reset-cells = <1>;
3058 			#power-domain-cells = <1>;
3061 		camnoc_virt: interconnect@ac00000 {
3075 			#clock-cells = <1>;
3076 			#reset-cells = <1>;
3077 			#power-domain-cells = <1>;
3094 			#interrupt-cells = <1>;
3134 					#address-cells = <1>;
3200 				assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
3207 				#address-cells = <1>;
3213 					#address-cells = <1>;
3223 					port@1 {
3224 						reg = <1>;
3259 				#clock-cells = <1>;
3302 					#address-cells = <1>;
3311 					port@1 {
3312 						reg = <1>;
3349 				 <&mdss_dsi0_phy 1>,
3358 			#clock-cells = <1>;
3359 			#reset-cells = <1>;
3360 			#power-domain-cells = <1>;
3366 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3375 			#reset-cells = <1>;
3386 			#thermal-sensor-cells = <1>;
3397 			#thermal-sensor-cells = <1>;
3403 			#reset-cells = <1>;
3429 			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3442 			#address-cells = <1>;
3443 			#size-cells = <1>;
3457 			#global-interrupts = <1>;
3555 				#msi-cells = <1>;
3565 			#mbox-cells = <1>;
3576 			#address-cells = <1>;
3577 			#size-cells = <1>;
3591 				frame-number = <1>;
3638 			reg-names = "drv-0", "drv-1", "drv-2";
3647 					  <CONTROL_TCS 1>;
3654 				#clock-cells = <1>;
3659 				#power-domain-cells = <1>;
3723 			#interconnect-cells = <1>;
3734 			#freq-domain-cells = <1>;
3735 			#clock-cells = <1>;
3770 			#clock-cells = <1>;
3771 			#power-domain-cells = <1>;
3803 			#sound-dai-cells = <1>;
3804 			#address-cells = <1>;
3820 			#clock-cells = <1>;
3821 			#power-domain-cells = <1>;
3832 			thermal-sensors = <&tsens0 1>;
4428 			thermal-sensors = <&tsens1 1>;
4616 		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,