Lines Matching +full:gpucc +full:- +full:sa8775p
1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
20 #size-cells = <2>;
23 xo_board_clk: xo-board-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
28 sleep_clk: sleep-clk {
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
35 #address-cells = <2>;
36 #size-cells = <0>;
42 enable-method = "psci";
43 qcom,freq-domain = <&cpufreq_hw 0>;
44 next-level-cache = <&L2_0>;
45 L2_0: l2-cache {
47 cache-level = <2>;
48 cache-unified;
49 next-level-cache = <&L3_0>;
50 L3_0: l3-cache {
52 cache-level = <3>;
53 cache-unified;
62 enable-method = "psci";
63 qcom,freq-domain = <&cpufreq_hw 0>;
64 next-level-cache = <&L2_1>;
65 L2_1: l2-cache {
67 cache-level = <2>;
68 cache-unified;
69 next-level-cache = <&L3_0>;
77 enable-method = "psci";
78 qcom,freq-domain = <&cpufreq_hw 0>;
79 next-level-cache = <&L2_2>;
80 L2_2: l2-cache {
82 cache-level = <2>;
83 cache-unified;
84 next-level-cache = <&L3_0>;
92 enable-method = "psci";
93 qcom,freq-domain = <&cpufreq_hw 0>;
94 next-level-cache = <&L2_3>;
95 L2_3: l2-cache {
97 cache-level = <2>;
98 cache-unified;
99 next-level-cache = <&L3_0>;
107 enable-method = "psci";
108 qcom,freq-domain = <&cpufreq_hw 1>;
109 next-level-cache = <&L2_4>;
110 L2_4: l2-cache {
112 cache-level = <2>;
113 cache-unified;
114 next-level-cache = <&L3_1>;
115 L3_1: l3-cache {
117 cache-level = <3>;
118 cache-unified;
128 enable-method = "psci";
129 qcom,freq-domain = <&cpufreq_hw 1>;
130 next-level-cache = <&L2_5>;
131 L2_5: l2-cache {
133 cache-level = <2>;
134 cache-unified;
135 next-level-cache = <&L3_1>;
143 enable-method = "psci";
144 qcom,freq-domain = <&cpufreq_hw 1>;
145 next-level-cache = <&L2_6>;
146 L2_6: l2-cache {
148 cache-level = <2>;
149 cache-unified;
150 next-level-cache = <&L3_1>;
158 enable-method = "psci";
159 qcom,freq-domain = <&cpufreq_hw 1>;
160 next-level-cache = <&L2_7>;
161 L2_7: l2-cache {
163 cache-level = <2>;
164 cache-unified;
165 next-level-cache = <&L3_1>;
169 cpu-map {
210 compatible = "qcom,scm-sa8775p", "qcom,scm";
214 aggre1_noc: interconnect-aggre1-noc {
215 compatible = "qcom,sa8775p-aggre1-noc";
216 #interconnect-cells = <2>;
217 qcom,bcm-voters = <&apps_bcm_voter>;
220 aggre2_noc: interconnect-aggre2-noc {
221 compatible = "qcom,sa8775p-aggre2-noc";
222 #interconnect-cells = <2>;
223 qcom,bcm-voters = <&apps_bcm_voter>;
226 clk_virt: interconnect-clk-virt {
227 compatible = "qcom,sa8775p-clk-virt";
228 #interconnect-cells = <2>;
229 qcom,bcm-voters = <&apps_bcm_voter>;
232 config_noc: interconnect-config-noc {
233 compatible = "qcom,sa8775p-config-noc";
234 #interconnect-cells = <2>;
235 qcom,bcm-voters = <&apps_bcm_voter>;
238 dc_noc: interconnect-dc-noc {
239 compatible = "qcom,sa8775p-dc-noc";
240 #interconnect-cells = <2>;
241 qcom,bcm-voters = <&apps_bcm_voter>;
244 gem_noc: interconnect-gem-noc {
245 compatible = "qcom,sa8775p-gem-noc";
246 #interconnect-cells = <2>;
247 qcom,bcm-voters = <&apps_bcm_voter>;
250 gpdsp_anoc: interconnect-gpdsp-anoc {
251 compatible = "qcom,sa8775p-gpdsp-anoc";
252 #interconnect-cells = <2>;
253 qcom,bcm-voters = <&apps_bcm_voter>;
256 lpass_ag_noc: interconnect-lpass-ag-noc {
257 compatible = "qcom,sa8775p-lpass-ag-noc";
258 #interconnect-cells = <2>;
259 qcom,bcm-voters = <&apps_bcm_voter>;
262 mc_virt: interconnect-mc-virt {
263 compatible = "qcom,sa8775p-mc-virt";
264 #interconnect-cells = <2>;
265 qcom,bcm-voters = <&apps_bcm_voter>;
268 mmss_noc: interconnect-mmss-noc {
269 compatible = "qcom,sa8775p-mmss-noc";
270 #interconnect-cells = <2>;
271 qcom,bcm-voters = <&apps_bcm_voter>;
274 nspa_noc: interconnect-nspa-noc {
275 compatible = "qcom,sa8775p-nspa-noc";
276 #interconnect-cells = <2>;
277 qcom,bcm-voters = <&apps_bcm_voter>;
280 nspb_noc: interconnect-nspb-noc {
281 compatible = "qcom,sa8775p-nspb-noc";
282 #interconnect-cells = <2>;
283 qcom,bcm-voters = <&apps_bcm_voter>;
286 pcie_anoc: interconnect-pcie-anoc {
287 compatible = "qcom,sa8775p-pcie-anoc";
288 #interconnect-cells = <2>;
289 qcom,bcm-voters = <&apps_bcm_voter>;
292 system_noc: interconnect-system-noc {
293 compatible = "qcom,sa8775p-system-noc";
294 #interconnect-cells = <2>;
295 qcom,bcm-voters = <&apps_bcm_voter>;
304 qup_opp_table_100mhz: opp-table-qup100mhz {
305 compatible = "operating-points-v2";
307 opp-100000000 {
308 opp-hz = /bits/ 64 <100000000>;
309 required-opps = <&rpmhpd_opp_svs_l1>;
314 compatible = "arm,armv8-pmuv3";
319 compatible = "arm,psci-1.0";
323 reserved-memory {
324 #address-cells = <2>;
325 #size-cells = <2>;
328 sail_ss_mem: sail-ss@80000000 {
330 no-map;
335 no-map;
338 xbl_boot_mem: xbl-boot@90600000 {
340 no-map;
343 aop_image_mem: aop-image@90800000 {
345 no-map;
348 aop_cmd_db_mem: aop-cmd-db@90860000 {
349 compatible = "qcom,cmd-db";
351 no-map;
354 uefi_log: uefi-log@908b0000 {
356 no-map;
361 no-map;
364 secdata_apss_mem: secdata-apss@908ff000 {
366 no-map;
372 no-map;
376 cpucp_fw_mem: cpucp-fw@90b00000 {
378 no-map;
381 lpass_machine_learning_mem: lpass-machine-learning@93b00000 {
383 no-map;
386 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@94a00000 {
388 no-map;
391 pil_camera_mem: pil-camera@95200000 {
393 no-map;
396 pil_adsp_mem: pil-adsp@95c00000 {
398 no-map;
401 pil_gdsp0_mem: pil-gdsp0@97b00000 {
403 no-map;
406 pil_gdsp1_mem: pil-gdsp1@99900000 {
408 no-map;
411 pil_cdsp0_mem: pil-cdsp0@9b800000 {
413 no-map;
416 pil_gpu_mem: pil-gpu@9d600000 {
418 no-map;
421 pil_cdsp1_mem: pil-cdsp1@9d700000 {
423 no-map;
426 pil_cvp_mem: pil-cvp@9f500000 {
428 no-map;
431 pil_video_mem: pil-video@9fc00000 {
433 no-map;
436 hyptz_reserved_mem: hyptz-reserved@beb00000 {
438 no-map;
441 tz_stat_mem: tz-stat@d0000000 {
443 no-map;
448 no-map;
453 no-map;
456 trusted_apps_mem: trusted-apps@d1800000 {
458 no-map;
463 compatible = "simple-bus";
464 #address-cells = <2>;
465 #size-cells = <2>;
468 gcc: clock-controller@100000 {
469 compatible = "qcom,sa8775p-gcc";
471 #clock-cells = <1>;
472 #reset-cells = <1>;
473 #power-domain-cells = <1>;
489 power-domains = <&rpmhpd SA8775P_CX>;
493 compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
496 interrupt-controller;
497 #interrupt-cells = <3>;
498 #mbox-cells = <2>;
502 compatible = "qcom,geni-se-qup";
507 clock-names = "m-ahb", "s-ahb";
509 #address-cells = <2>;
510 #size-cells = <2>;
514 compatible = "qcom,geni-i2c";
516 #address-cells = <1>;
517 #size-cells = <0>;
520 clock-names = "se";
527 interconnect-names = "qup-core",
528 "qup-config",
529 "qup-memory";
530 power-domains = <&rpmhpd SA8775P_CX>;
535 compatible = "qcom,geni-spi";
537 #address-cells = <1>;
538 #size-cells = <0>;
541 clock-names = "se";
548 interconnect-names = "qup-core",
549 "qup-config",
550 "qup-memory";
551 power-domains = <&rpmhpd SA8775P_CX>;
556 compatible = "qcom,geni-i2c";
558 #address-cells = <1>;
559 #size-cells = <0>;
562 clock-names = "se";
569 interconnect-names = "qup-core",
570 "qup-config",
571 "qup-memory";
572 power-domains = <&rpmhpd SA8775P_CX>;
577 compatible = "qcom,geni-spi";
579 #address-cells = <1>;
580 #size-cells = <0>;
583 clock-names = "se";
590 interconnect-names = "qup-core",
591 "qup-config",
592 "qup-memory";
593 power-domains = <&rpmhpd SA8775P_CX>;
598 compatible = "qcom,geni-i2c";
600 #address-cells = <1>;
601 #size-cells = <0>;
604 clock-names = "se";
611 interconnect-names = "qup-core",
612 "qup-config",
613 "qup-memory";
614 power-domains = <&rpmhpd SA8775P_CX>;
619 compatible = "qcom,geni-spi";
623 clock-names = "se";
630 interconnect-names = "qup-core",
631 "qup-config",
632 "qup-memory";
633 power-domains = <&rpmhpd SA8775P_CX>;
634 #address-cells = <1>;
635 #size-cells = <0>;
640 compatible = "qcom,geni-i2c";
642 #address-cells = <1>;
643 #size-cells = <0>;
646 clock-names = "se";
653 interconnect-names = "qup-core",
654 "qup-config",
655 "qup-memory";
656 power-domains = <&rpmhpd SA8775P_CX>;
661 compatible = "qcom,geni-spi";
663 #address-cells = <1>;
664 #size-cells = <0>;
667 clock-names = "se";
674 interconnect-names = "qup-core",
675 "qup-config",
676 "qup-memory";
677 power-domains = <&rpmhpd SA8775P_CX>;
682 compatible = "qcom,geni-uart";
686 clock-names = "se";
691 interconnect-names = "qup-core", "qup-config";
692 power-domains = <&rpmhpd SA8775P_CX>;
697 compatible = "qcom,geni-i2c";
701 clock-names = "se";
708 interconnect-names = "qup-core",
709 "qup-config",
710 "qup-memory";
711 power-domains = <&rpmhpd SA8775P_CX>;
712 #address-cells = <1>;
713 #size-cells = <0>;
718 compatible = "qcom,geni-spi";
720 #address-cells = <1>;
721 #size-cells = <0>;
724 clock-names = "se";
731 interconnect-names = "qup-core",
732 "qup-config",
733 "qup-memory";
734 power-domains = <&rpmhpd SA8775P_CX>;
739 compatible = "qcom,geni-i2c";
741 #address-cells = <1>;
742 #size-cells = <0>;
745 clock-names = "se";
752 interconnect-names = "qup-core",
753 "qup-config",
754 "qup-memory";
755 power-domains = <&rpmhpd SA8775P_CX>;
760 compatible = "qcom,geni-spi";
762 #address-cells = <1>;
763 #size-cells = <0>;
766 clock-names = "se";
773 interconnect-names = "qup-core",
774 "qup-config",
775 "qup-memory";
776 power-domains = <&rpmhpd SA8775P_CX>;
781 compatible = "qcom,geni-i2c";
783 #address-cells = <1>;
784 #size-cells = <0>;
787 clock-names = "se";
794 interconnect-names = "qup-core",
795 "qup-config",
796 "qup-memory";
797 power-domains = <&rpmhpd SA8775P_CX>;
802 compatible = "qcom,geni-spi";
804 #address-cells = <1>;
805 #size-cells = <0>;
808 clock-names = "se";
815 interconnect-names = "qup-core",
816 "qup-config",
817 "qup-memory";
818 power-domains = <&rpmhpd SA8775P_CX>;
824 compatible = "qcom,geni-se-qup";
826 #address-cells = <2>;
827 #size-cells = <2>;
829 clock-names = "m-ahb", "s-ahb";
836 compatible = "qcom,geni-i2c";
838 #address-cells = <1>;
839 #size-cells = <0>;
842 clock-names = "se";
849 interconnect-names = "qup-core",
850 "qup-config",
851 "qup-memory";
852 power-domains = <&rpmhpd SA8775P_CX>;
857 compatible = "qcom,geni-spi";
859 #address-cells = <1>;
860 #size-cells = <0>;
863 clock-names = "se";
870 interconnect-names = "qup-core",
871 "qup-config",
872 "qup-memory";
873 power-domains = <&rpmhpd SA8775P_CX>;
878 compatible = "qcom,geni-i2c";
880 #address-cells = <1>;
881 #size-cells = <0>;
884 clock-names = "se";
891 interconnect-names = "qup-core",
892 "qup-config",
893 "qup-memory";
894 power-domains = <&rpmhpd SA8775P_CX>;
899 compatible = "qcom,geni-spi";
901 #address-cells = <1>;
902 #size-cells = <0>;
905 clock-names = "se";
912 interconnect-names = "qup-core",
913 "qup-config",
914 "qup-memory";
915 power-domains = <&rpmhpd SA8775P_CX>;
920 compatible = "qcom,geni-i2c";
922 #address-cells = <1>;
923 #size-cells = <0>;
926 clock-names = "se";
933 interconnect-names = "qup-core",
934 "qup-config",
935 "qup-memory";
936 power-domains = <&rpmhpd SA8775P_CX>;
941 compatible = "qcom,geni-spi";
943 #address-cells = <1>;
944 #size-cells = <0>;
947 clock-names = "se";
954 interconnect-names = "qup-core",
955 "qup-config",
956 "qup-memory";
957 power-domains = <&rpmhpd SA8775P_CX>;
962 compatible = "qcom,geni-i2c";
964 #address-cells = <1>;
965 #size-cells = <0>;
968 clock-names = "se";
975 interconnect-names = "qup-core",
976 "qup-config",
977 "qup-memory";
978 power-domains = <&rpmhpd SA8775P_CX>;
983 compatible = "qcom,geni-spi";
985 #address-cells = <1>;
986 #size-cells = <0>;
989 clock-names = "se";
996 interconnect-names = "qup-core",
997 "qup-config",
998 "qup-memory";
999 power-domains = <&rpmhpd SA8775P_CX>;
1004 compatible = "qcom,geni-i2c";
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1010 clock-names = "se";
1017 interconnect-names = "qup-core",
1018 "qup-config",
1019 "qup-memory";
1020 power-domains = <&rpmhpd SA8775P_CX>;
1025 compatible = "qcom,geni-spi";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1031 clock-names = "se";
1038 interconnect-names = "qup-core",
1039 "qup-config",
1040 "qup-memory";
1041 power-domains = <&rpmhpd SA8775P_CX>;
1046 compatible = "qcom,geni-i2c";
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1052 clock-names = "se";
1059 interconnect-names = "qup-core",
1060 "qup-config",
1061 "qup-memory";
1062 power-domains = <&rpmhpd SA8775P_CX>;
1067 compatible = "qcom,geni-spi";
1069 #address-cells = <1>;
1070 #size-cells = <0>;
1073 clock-names = "se";
1080 interconnect-names = "qup-core",
1081 "qup-config",
1082 "qup-memory";
1083 power-domains = <&rpmhpd SA8775P_CX>;
1088 compatible = "qcom,geni-uart";
1092 clock-names = "se";
1097 interconnect-names = "qup-core", "qup-config";
1098 power-domains = <&rpmhpd SA8775P_CX>;
1104 compatible = "qcom,geni-se-qup";
1106 #address-cells = <2>;
1107 #size-cells = <2>;
1109 clock-names = "m-ahb", "s-ahb";
1116 compatible = "qcom,geni-i2c";
1118 #address-cells = <1>;
1119 #size-cells = <0>;
1122 clock-names = "se";
1129 interconnect-names = "qup-core",
1130 "qup-config",
1131 "qup-memory";
1132 power-domains = <&rpmhpd SA8775P_CX>;
1137 compatible = "qcom,geni-spi";
1139 #address-cells = <1>;
1140 #size-cells = <0>;
1143 clock-names = "se";
1150 interconnect-names = "qup-core",
1151 "qup-config",
1152 "qup-memory";
1153 power-domains = <&rpmhpd SA8775P_CX>;
1158 compatible = "qcom,geni-i2c";
1160 #address-cells = <1>;
1161 #size-cells = <0>;
1164 clock-names = "se";
1171 interconnect-names = "qup-core",
1172 "qup-config",
1173 "qup-memory";
1174 power-domains = <&rpmhpd SA8775P_CX>;
1179 compatible = "qcom,geni-spi";
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1185 clock-names = "se";
1192 interconnect-names = "qup-core",
1193 "qup-config",
1194 "qup-memory";
1195 power-domains = <&rpmhpd SA8775P_CX>;
1200 compatible = "qcom,geni-i2c";
1202 #address-cells = <1>;
1203 #size-cells = <0>;
1206 clock-names = "se";
1213 interconnect-names = "qup-core",
1214 "qup-config",
1215 "qup-memory";
1216 power-domains = <&rpmhpd SA8775P_CX>;
1221 compatible = "qcom,geni-spi";
1223 #address-cells = <1>;
1224 #size-cells = <0>;
1227 clock-names = "se";
1234 interconnect-names = "qup-core",
1235 "qup-config",
1236 "qup-memory";
1237 power-domains = <&rpmhpd SA8775P_CX>;
1242 compatible = "qcom,geni-uart";
1246 clock-names = "se";
1251 interconnect-names = "qup-core", "qup-config";
1252 power-domains = <&rpmhpd SA8775P_CX>;
1257 compatible = "qcom,geni-i2c";
1259 #address-cells = <1>;
1260 #size-cells = <0>;
1263 clock-names = "se";
1270 interconnect-names = "qup-core",
1271 "qup-config",
1272 "qup-memory";
1273 power-domains = <&rpmhpd SA8775P_CX>;
1278 compatible = "qcom,geni-spi";
1280 #address-cells = <1>;
1281 #size-cells = <0>;
1284 clock-names = "se";
1291 interconnect-names = "qup-core",
1292 "qup-config",
1293 "qup-memory";
1294 power-domains = <&rpmhpd SA8775P_CX>;
1299 compatible = "qcom,geni-uart";
1302 clock-names = "se";
1304 interconnect-names = "qup-core", "qup-config";
1309 power-domains = <&rpmhpd SA8775P_CX>;
1310 operating-points-v2 = <&qup_opp_table_100mhz>;
1315 compatible = "qcom,geni-i2c";
1317 #address-cells = <1>;
1318 #size-cells = <0>;
1321 clock-names = "se";
1328 interconnect-names = "qup-core",
1329 "qup-config",
1330 "qup-memory";
1331 power-domains = <&rpmhpd SA8775P_CX>;
1336 compatible = "qcom,geni-spi";
1338 #address-cells = <1>;
1339 #size-cells = <0>;
1342 clock-names = "se";
1349 interconnect-names = "qup-core",
1350 "qup-config",
1351 "qup-memory";
1352 power-domains = <&rpmhpd SA8775P_CX>;
1357 compatible = "qcom,geni-i2c";
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1363 clock-names = "se";
1370 interconnect-names = "qup-core",
1371 "qup-config",
1372 "qup-memory";
1373 power-domains = <&rpmhpd SA8775P_CX>;
1378 compatible = "qcom,geni-spi";
1380 #address-cells = <1>;
1381 #size-cells = <0>;
1384 clock-names = "se";
1391 interconnect-names = "qup-core",
1392 "qup-config",
1393 "qup-memory";
1394 power-domains = <&rpmhpd SA8775P_CX>;
1399 compatible = "qcom,geni-uart";
1403 clock-names = "se";
1408 interconnect-names = "qup-core", "qup-config";
1409 power-domains = <&rpmhpd SA8775P_CX>;
1414 compatible = "qcom,geni-i2c";
1416 #address-cells = <1>;
1417 #size-cells = <0>;
1420 clock-names = "se";
1427 interconnect-names = "qup-core",
1428 "qup-config",
1429 "qup-memory";
1430 power-domains = <&rpmhpd SA8775P_CX>;
1436 compatible = "qcom,geni-se-qup";
1438 #address-cells = <2>;
1439 #size-cells = <2>;
1441 clock-names = "m-ahb", "s-ahb";
1448 compatible = "qcom,geni-i2c";
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1454 clock-names = "se";
1461 interconnect-names = "qup-core",
1462 "qup-config",
1463 "qup-memory";
1464 power-domains = <&rpmhpd SA8775P_CX>;
1469 compatible = "qcom,geni-spi";
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1475 clock-names = "se";
1482 interconnect-names = "qup-core",
1483 "qup-config",
1484 "qup-memory";
1485 power-domains = <&rpmhpd SA8775P_CX>;
1491 compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
1495 phy-names = "ufsphy";
1496 lanes-per-direction = <2>;
1497 #reset-cells = <1>;
1499 reset-names = "rst";
1500 power-domains = <&gcc UFS_PHY_GDSC>;
1501 required-opps = <&rpmhpd_opp_nom>;
1503 dma-coherent;
1512 clock-names = "core_clk",
1520 freq-table-hz = <75000000 300000000>,
1532 compatible = "qcom,sa8775p-qmp-ufs-phy";
1541 clock-names = "ref", "ref_aux", "qref";
1542 power-domains = <&gcc UFS_PHY_GDSC>;
1544 reset-names = "ufsphy";
1545 #phy-cells = <0>;
1550 compatible = "qcom,sa8775p-usb-hs-phy",
1551 "qcom,usb-snps-hs-5nm-phy";
1554 clock-names = "ref";
1557 #phy-cells = <0>;
1563 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
1570 clock-names = "aux", "ref", "com_aux", "pipe";
1574 reset-names = "phy", "phy_phy";
1576 power-domains = <&gcc USB30_PRIM_GDSC>;
1578 #clock-cells = <0>;
1579 clock-output-names = "usb3_prim_phy_pipe_clk_src";
1581 #phy-cells = <0>;
1587 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
1589 #address-cells = <2>;
1590 #size-cells = <2>;
1598 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1600 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1602 assigned-clock-rates = <19200000>, <200000000>;
1604 interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
1608 interrupt-names = "pwr_event",
1613 power-domains = <&gcc USB30_PRIM_GDSC>;
1614 required-opps = <&rpmhpd_opp_nom>;
1620 interconnect-names = "usb-ddr", "apps-usb";
1622 wakeup-source;
1632 phy-names = "usb2-phy", "usb3-phy";
1637 compatible = "qcom,sa8775p-usb-hs-phy",
1638 "qcom,usb-snps-hs-5nm-phy";
1641 clock-names = "ref";
1644 #phy-cells = <0>;
1650 compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
1657 clock-names = "aux", "ref", "com_aux", "pipe";
1661 reset-names = "phy", "phy_phy";
1663 power-domains = <&gcc USB30_SEC_GDSC>;
1665 #clock-cells = <0>;
1666 clock-output-names = "usb3_sec_phy_pipe_clk_src";
1668 #phy-cells = <0>;
1674 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
1676 #address-cells = <2>;
1677 #size-cells = <2>;
1685 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1687 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
1689 assigned-clock-rates = <19200000>, <200000000>;
1691 interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
1695 interrupt-names = "pwr_event",
1700 power-domains = <&gcc USB30_SEC_GDSC>;
1701 required-opps = <&rpmhpd_opp_nom>;
1707 interconnect-names = "usb-ddr", "apps-usb";
1709 wakeup-source;
1719 phy-names = "usb2-phy", "usb3-phy";
1724 compatible = "qcom,sa8775p-usb-hs-phy",
1725 "qcom,usb-snps-hs-5nm-phy";
1728 clock-names = "ref";
1731 #phy-cells = <0>;
1737 compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
1739 #address-cells = <2>;
1740 #size-cells = <2>;
1748 clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
1750 assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
1752 assigned-clock-rates = <19200000>, <200000000>;
1754 interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
1757 interrupt-names = "pwr_event",
1761 power-domains = <&gcc USB20_PRIM_GDSC>;
1762 required-opps = <&rpmhpd_opp_nom>;
1768 interconnect-names = "usb-ddr", "apps-usb";
1770 wakeup-source;
1780 phy-names = "usb2-phy";
1785 compatible = "qcom,tcsr-mutex";
1787 #hwlock-cells = <1>;
1790 gpucc: clock-controller@3d90000 { label
1791 compatible = "qcom,sa8775p-gpucc";
1796 clock-names = "bi_tcxo",
1799 #clock-cells = <1>;
1800 #reset-cells = <1>;
1801 #power-domain-cells = <1>;
1805 compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
1806 "qcom,smmu-500", "arm,mmu-500";
1808 #iommu-cells = <2>;
1809 #global-interrupts = <2>;
1810 dma-coherent;
1811 power-domains = <&gpucc GPU_CC_CX_GDSC>;
1814 <&gpucc GPU_CC_AHB_CLK>,
1815 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
1816 <&gpucc GPU_CC_CX_GMU_CLK>,
1817 <&gpucc GPU_CC_HUB_CX_INT_CLK>,
1818 <&gpucc GPU_CC_HUB_AON_CLK>;
1819 clock-names = "gcc_gpu_memnoc_gfx_clk",
1841 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
1844 clock-names = "sgmi_ref";
1845 #phy-cells = <0>;
1850 compatible = "qcom,sa8775p-dwmac-sgmii-phy";
1853 clock-names = "sgmi_ref";
1854 #phy-cells = <0>;
1858 pdc: interrupt-controller@b220000 {
1859 compatible = "qcom,sa8775p-pdc", "qcom,pdc";
1862 qcom,pdc-ranges = <0 480 40>,
1900 #interrupt-cells = <2>;
1901 interrupt-parent = <&intc>;
1902 interrupt-controller;
1905 aoss_qmp: power-management@c300000 {
1906 compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
1908 interrupts-extended = <&ipcc IPCC_CLIENT_AOP
1912 #clock-cells = <0>;
1916 compatible = "qcom,spmi-pmic-arb";
1922 reg-names = "core",
1929 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
1930 interrupt-names = "periph_irq";
1931 interrupt-controller;
1932 #interrupt-cells = <4>;
1933 #address-cells = <2>;
1934 #size-cells = <0>;
1938 compatible = "qcom,sa8775p-tlmm";
1941 gpio-controller;
1942 #gpio-cells = <2>;
1943 interrupt-controller;
1944 #interrupt-cells = <2>;
1945 gpio-ranges = <&tlmm 0 0 149>;
1946 wakeup-parent = <&pdc>;
1950 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
1952 #iommu-cells = <2>;
1953 #global-interrupts = <2>;
1954 dma-coherent;
2089 compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
2091 #iommu-cells = <2>;
2092 #global-interrupts = <2>;
2093 dma-coherent;
2163 intc: interrupt-controller@17a00000 {
2164 compatible = "arm,gic-v3";
2167 interrupt-controller;
2168 #interrupt-cells = <3>;
2170 #redistributor-regions = <1>;
2171 redistributor-stride = <0x0 0x20000>;
2175 compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
2182 compatible = "arm,armv7-timer-mem";
2185 #address-cells = <1>;
2186 #size-cells = <1>;
2193 frame-number = <0>;
2199 frame-number = <1>;
2206 frame-number = <2>;
2213 frame-number = <3>;
2220 frame-number = <4>;
2227 frame-number = <5>;
2234 frame-number = <6>;
2240 compatible = "qcom,rpmh-rsc";
2244 reg-names = "drv-0", "drv-1", "drv-2";
2248 qcom,tcs-offset = <0xd00>;
2249 qcom,drv-id = <2>;
2250 qcom,tcs-config = <ACTIVE_TCS 2>,
2256 apps_bcm_voter: bcm-voter {
2257 compatible = "qcom,bcm-voter";
2260 rpmhcc: clock-controller {
2261 compatible = "qcom,sa8775p-rpmh-clk";
2262 #clock-cells = <1>;
2263 clock-names = "xo";
2267 rpmhpd: power-controller {
2268 compatible = "qcom,sa8775p-rpmhpd";
2269 #power-domain-cells = <1>;
2270 operating-points-v2 = <&rpmhpd_opp_table>;
2272 rpmhpd_opp_table: opp-table {
2273 compatible = "operating-points-v2";
2275 rpmhpd_opp_ret: opp-0 {
2276 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
2279 rpmhpd_opp_min_svs: opp-1 {
2280 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
2284 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
2288 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
2291 rpmhpd_opp_svs_l1: opp-4 {
2292 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
2295 rpmhpd_opp_nom: opp-5 {
2296 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
2299 rpmhpd_opp_nom_l1: opp-6 {
2300 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
2303 rpmhpd_opp_nom_l2: opp-7 {
2304 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
2307 rpmhpd_opp_turbo: opp-8 {
2308 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
2311 rpmhpd_opp_turbo_l1: opp-9 {
2312 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
2319 compatible = "qcom,sa8775p-cpufreq-epss",
2320 "qcom,cpufreq-epss";
2323 reg-names = "freq-domain0", "freq-domain1";
2326 clock-names = "xo", "alternate";
2328 #freq-domain-cells = <1>;
2332 compatible = "qcom,sa8775p-ethqos";
2335 reg-names = "stmmaceth", "rgmii";
2338 interrupt-names = "macirq";
2344 clock-names = "stmmaceth",
2349 power-domains = <&gcc EMAC1_GDSC>;
2352 phy-names = "serdes";
2355 dma-coherent;
2359 rx-fifo-depth = <16384>;
2360 tx-fifo-depth = <16384>;
2366 compatible = "qcom,sa8775p-ethqos";
2369 reg-names = "stmmaceth", "rgmii";
2372 interrupt-names = "macirq";
2378 clock-names = "stmmaceth",
2383 power-domains = <&gcc EMAC0_GDSC>;
2386 phy-names = "serdes";
2389 dma-coherent;
2393 rx-fifo-depth = <16384>;
2394 tx-fifo-depth = <16384>;
2401 compatible = "arm,armv8-timer";
2409 compatible = "qcom,pcie-sa8775p";
2416 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
2419 #address-cells = <3>;
2420 #size-cells = <2>;
2423 bus-range = <0x00 0xff>;
2425 dma-coherent;
2427 linux,pci-domain = <0>;
2428 num-lanes = <2>;
2438 interrupt-names = "msi0", "msi1", "msi2", "msi3",
2440 #interrupt-cells = <1>;
2441 interrupt-map-mask = <0 0 0 0x7>;
2442 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
2453 clock-names = "aux",
2459 assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
2460 assigned-clock-rates = <19200000>;
2464 interconnect-names = "pcie-mem", "cpu-pcie";
2466 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
2470 reset-names = "pci";
2471 power-domains = <&gcc PCIE_0_GDSC>;
2474 phy-names = "pciephy";
2480 compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
2491 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
2494 assigned-clocks = <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>;
2495 assigned-clock-rates = <100000000>;
2498 reset-names = "phy";
2500 #clock-cells = <0>;
2501 clock-output-names = "pcie_0_pipe_clk";
2503 #phy-cells = <0>;
2509 compatible = "qcom,pcie-sa8775p";
2516 reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
2519 #address-cells = <3>;
2520 #size-cells = <2>;
2523 bus-range = <0x00 0xff>;
2525 dma-coherent;
2527 linux,pci-domain = <1>;
2528 num-lanes = <4>;
2538 interrupt-names = "msi0", "msi1", "msi2", "msi3",
2540 #interrupt-cells = <1>;
2541 interrupt-map-mask = <0 0 0 0x7>;
2542 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2553 clock-names = "aux",
2559 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
2560 assigned-clock-rates = <19200000>;
2564 interconnect-names = "pcie-mem", "cpu-pcie";
2566 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
2570 reset-names = "pci";
2571 power-domains = <&gcc PCIE_1_GDSC>;
2574 phy-names = "pciephy";
2580 compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
2591 clock-names = "aux", "cfg_ahb", "ref", "rchng", "pipe",
2594 assigned-clocks = <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>;
2595 assigned-clock-rates = <100000000>;
2598 reset-names = "phy";
2600 #clock-cells = <0>;
2601 clock-output-names = "pcie_1_pipe_clk";
2603 #phy-cells = <0>;