Lines Matching +full:0 +full:x01c13000
25 #clock-cells = <0>;
30 #clock-cells = <0>;
36 #size-cells = <0>;
38 CPU0: cpu@0 {
41 reg = <0x0 0x0>;
43 qcom,freq-domain = <&cpufreq_hw 0>;
61 reg = <0x0 0x100>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x200>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
91 reg = <0x0 0x300>;
93 qcom,freq-domain = <&cpufreq_hw 0>;
106 reg = <0x0 0x10000>;
127 reg = <0x0 0x10100>;
142 reg = <0x0 0x10200>;
157 reg = <0x0 0x10300>;
301 reg = <0x0 0x80000000 0x0 0x0>;
329 reg = <0x0 0x80000000 0x0 0x10000000>;
334 reg = <0x0 0x90000000 0x0 0x600000>;
339 reg = <0x0 0x90600000 0x0 0x200000>;
344 reg = <0x0 0x90800000 0x0 0x60000>;
350 reg = <0x0 0x90860000 0x0 0x20000>;
355 reg = <0x0 0x908b0000 0x0 0x10000>;
360 reg = <0x0 0x908f0000 0x0 0xf000>;
365 reg = <0x0 0x908ff000 0x0 0x1000>;
371 reg = <0x0 0x90900000 0x0 0x200000>;
377 reg = <0x0 0x90b00000 0x0 0x100000>;
382 reg = <0x0 0x93b00000 0x0 0xf00000>;
387 reg = <0x0 0x94a00000 0x0 0x800000>;
392 reg = <0x0 0x95200000 0x0 0x500000>;
397 reg = <0x0 0x95c00000 0x0 0x1e00000>;
402 reg = <0x0 0x97b00000 0x0 0x1e00000>;
407 reg = <0x0 0x99900000 0x0 0x1e00000>;
412 reg = <0x0 0x9b800000 0x0 0x1e00000>;
417 reg = <0x0 0x9d600000 0x0 0x2000>;
422 reg = <0x0 0x9d700000 0x0 0x1e00000>;
427 reg = <0x0 0x9f500000 0x0 0x700000>;
432 reg = <0x0 0x9fc00000 0x0 0x700000>;
437 reg = <0x0 0xbeb00000 0x0 0x11500000>;
442 reg = <0x0 0xd0000000 0x0 0x100000>;
447 reg = <0x0 0xd0100000 0x0 0x1200000>;
452 reg = <0x0 0xd1300000 0x0 0x500000>;
457 reg = <0x0 0xd1800000 0x0 0x3900000>;
462 soc: soc@0 {
466 ranges = <0 0 0 0 0x10 0>;
470 reg = <0x0 0x00100000 0x0 0xc7018>;
476 <0>,
477 <0>,
478 <0>,
481 <0>,
482 <0>,
483 <0>,
486 <0>,
487 <0>,
488 <0>;
494 reg = <0x0 0x00408000 0x0 0x1000>;
503 reg = <0x0 0x008c0000 0x0 0x6000>;
508 iommus = <&apps_smmu 0x5a3 0x0>;
515 reg = <0x0 0x880000 0x0 0x4000>;
517 #size-cells = <0>;
536 reg = <0x0 0x880000 0x0 0x4000>;
538 #size-cells = <0>;
557 reg = <0x0 0x884000 0x0 0x4000>;
559 #size-cells = <0>;
578 reg = <0x0 0x884000 0x0 0x4000>;
580 #size-cells = <0>;
599 reg = <0x0 0x888000 0x0 0x4000>;
601 #size-cells = <0>;
620 reg = <0x0 0x00888000 0x0 0x4000>;
635 #size-cells = <0>;
641 reg = <0x0 0x88c000 0x0 0x4000>;
643 #size-cells = <0>;
662 reg = <0x0 0x88c000 0x0 0x4000>;
664 #size-cells = <0>;
683 reg = <0x0 0x0088c000 0x0 0x4000>;
698 reg = <0x0 0x00890000 0x0 0x4000>;
713 #size-cells = <0>;
719 reg = <0x0 0x890000 0x0 0x4000>;
721 #size-cells = <0>;
740 reg = <0x0 0x894000 0x0 0x4000>;
742 #size-cells = <0>;
761 reg = <0x0 0x894000 0x0 0x4000>;
763 #size-cells = <0>;
782 reg = <0x0 0x898000 0x0 0x4000>;
784 #size-cells = <0>;
803 reg = <0x0 0x898000 0x0 0x4000>;
805 #size-cells = <0>;
825 reg = <0x0 0x9c0000 0x0 0x6000>;
832 iommus = <&apps_smmu 0x403 0x0>;
837 reg = <0x0 0x980000 0x0 0x4000>;
839 #size-cells = <0>;
858 reg = <0x0 0x980000 0x0 0x4000>;
860 #size-cells = <0>;
879 reg = <0x0 0x984000 0x0 0x4000>;
881 #size-cells = <0>;
900 reg = <0x0 0x984000 0x0 0x4000>;
902 #size-cells = <0>;
921 reg = <0x0 0x988000 0x0 0x4000>;
923 #size-cells = <0>;
942 reg = <0x0 0x988000 0x0 0x4000>;
944 #size-cells = <0>;
963 reg = <0x0 0x98c000 0x0 0x4000>;
965 #size-cells = <0>;
984 reg = <0x0 0x98c000 0x0 0x4000>;
986 #size-cells = <0>;
1005 reg = <0x0 0x990000 0x0 0x4000>;
1007 #size-cells = <0>;
1026 reg = <0x0 0x990000 0x0 0x4000>;
1028 #size-cells = <0>;
1047 reg = <0x0 0x994000 0x0 0x4000>;
1049 #size-cells = <0>;
1068 reg = <0x0 0x994000 0x0 0x4000>;
1070 #size-cells = <0>;
1089 reg = <0x0 0x994000 0x0 0x4000>;
1105 reg = <0x0 0x00ac0000 0x0 0x6000>;
1112 iommus = <&apps_smmu 0x443 0x0>;
1117 reg = <0x0 0xa80000 0x0 0x4000>;
1119 #size-cells = <0>;
1138 reg = <0x0 0xa80000 0x0 0x4000>;
1140 #size-cells = <0>;
1159 reg = <0x0 0xa84000 0x0 0x4000>;
1161 #size-cells = <0>;
1180 reg = <0x0 0xa84000 0x0 0x4000>;
1182 #size-cells = <0>;
1201 reg = <0x0 0xa88000 0x0 0x4000>;
1203 #size-cells = <0>;
1222 reg = <0x0 0xa88000 0x0 0x4000>;
1224 #size-cells = <0>;
1243 reg = <0x0 0xa88000 0x0 0x4000>;
1258 reg = <0x0 0xa8c000 0x0 0x4000>;
1260 #size-cells = <0>;
1279 reg = <0x0 0xa8c000 0x0 0x4000>;
1281 #size-cells = <0>;
1300 reg = <0x0 0x00a8c000 0x0 0x4000>;
1305 interconnects = <&clk_virt MASTER_QUP_CORE_1 0
1306 &clk_virt SLAVE_QUP_CORE_1 0>,
1307 <&gem_noc MASTER_APPSS_PROC 0
1308 &config_noc SLAVE_QUP_1 0>;
1316 reg = <0x0 0xa90000 0x0 0x4000>;
1318 #size-cells = <0>;
1337 reg = <0x0 0xa90000 0x0 0x4000>;
1339 #size-cells = <0>;
1358 reg = <0x0 0xa94000 0x0 0x4000>;
1360 #size-cells = <0>;
1379 reg = <0x0 0xa94000 0x0 0x4000>;
1381 #size-cells = <0>;
1400 reg = <0x0 0x00a94000 0x0 0x4000>;
1415 reg = <0x0 0xa98000 0x0 0x4000>;
1417 #size-cells = <0>;
1437 reg = <0x0 0xbc0000 0x0 0x6000>;
1444 iommus = <&apps_smmu 0x43 0x0>;
1449 reg = <0x0 0xb80000 0x0 0x4000>;
1451 #size-cells = <0>;
1470 reg = <0x0 0xb80000 0x0 0x4000>;
1472 #size-cells = <0>;
1492 reg = <0x0 0x01d84000 0x0 0x3000>;
1502 iommus = <&apps_smmu 0x100 0x0>;
1521 <0 0>,
1522 <0 0>,
1524 <0 0>,
1525 <0 0>,
1526 <0 0>,
1527 <0 0>;
1533 reg = <0x0 0x01d87000 0x0 0xe10>;
1543 resets = <&ufs_mem_hc 0>;
1545 #phy-cells = <0>;
1552 reg = <0 0x088e4000 0 0x120>;
1557 #phy-cells = <0>;
1564 reg = <0 0x088e8000 0 0x2000>;
1578 #clock-cells = <0>;
1581 #phy-cells = <0>;
1588 reg = <0 0x0a6f8800 0 0x400>;
1618 interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
1619 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
1628 reg = <0 0x0a600000 0 0xe000>;
1630 iommus = <&apps_smmu 0x080 0x0>;
1639 reg = <0 0x088e6000 0 0x120>;
1644 #phy-cells = <0>;
1651 reg = <0 0x088ea000 0 0x2000>;
1665 #clock-cells = <0>;
1668 #phy-cells = <0>;
1675 reg = <0 0x0a8f8800 0 0x400>;
1705 interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
1706 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
1715 reg = <0 0x0a800000 0 0xe000>;
1717 iommus = <&apps_smmu 0x0a0 0x0>;
1726 reg = <0 0x088e7000 0 0x120>;
1731 #phy-cells = <0>;
1738 reg = <0 0x0a4f8800 0 0x400>;
1766 interconnects = <&aggre1_noc MASTER_USB2 0 &mc_virt SLAVE_EBI1 0>,
1767 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB2 0>;
1776 reg = <0 0x0a400000 0 0xe000>;
1778 iommus = <&apps_smmu 0x020 0x0>;
1786 reg = <0x0 0x01f40000 0x0 0x20000>;
1792 reg = <0x0 0x03d90000 0x0 0xa000>;
1807 reg = <0x0 0x03da0000 0x0 0x20000>;
1842 reg = <0x0 0x08901000 0x0 0xe10>;
1845 #phy-cells = <0>;
1851 reg = <0x0 0x08902000 0x0 0xe10>;
1854 #phy-cells = <0>;
1860 reg = <0x0 0x0b220000 0x0 0x30000>,
1861 <0x0 0x17c000f0 0x0 0x64>;
1862 qcom,pdc-ranges = <0 480 40>,
1907 reg = <0x0 0x0c300000 0x0 0x400>;
1912 #clock-cells = <0>;
1917 reg = <0x0 0x0c440000 0x0 0x1100>,
1918 <0x0 0x0c600000 0x0 0x2000000>,
1919 <0x0 0x0e600000 0x0 0x100000>,
1920 <0x0 0x0e700000 0x0 0xa0000>,
1921 <0x0 0x0c40a000 0x0 0x26000>;
1927 qcom,channel = <0>;
1928 qcom,ee = <0>;
1934 #size-cells = <0>;
1939 reg = <0x0 0x0f000000 0x0 0x1000000>;
1945 gpio-ranges = <&tlmm 0 0 149>;
1951 reg = <0x0 0x15000000 0x0 0x100000>;
2090 reg = <0x0 0x15200000 0x0 0x80000>;
2165 reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */
2166 <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */
2171 redistributor-stride = <0x0 0x20000>;
2176 reg = <0x0 0x17c10000 0x0 0x1000>;
2178 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
2183 reg = <0x0 0x17c20000 0x0 0x1000>;
2184 ranges = <0x0 0x0 0x0 0x20000000>;
2189 reg = <0x17c21000 0x1000>,
2190 <0x17c22000 0x1000>;
2193 frame-number = <0>;
2197 reg = <0x17c23000 0x1000>;
2204 reg = <0x17c25000 0x1000>;
2211 reg = <0x17c27000 0x1000>;
2218 reg = <0x17c29000 0x1000>;
2225 reg = <0x17c2b000 0x1000>;
2232 reg = <0x17c2d000 0x1000>;
2241 reg = <0x0 0x18200000 0x0 0x10000>,
2242 <0x0 0x18210000 0x0 0x10000>,
2243 <0x0 0x18220000 0x0 0x10000>;
2244 reg-names = "drv-0", "drv-1", "drv-2";
2248 qcom,tcs-offset = <0xd00>;
2253 <CONTROL_TCS 0>;
2275 rpmhpd_opp_ret: opp-0 {
2321 reg = <0x0 0x18591000 0x0 0x1000>,
2322 <0x0 0x18593000 0x0 0x1000>;
2333 reg = <0x0 0x23000000 0x0 0x10000>,
2334 <0x0 0x23016000 0x0 0x100>;
2354 iommus = <&apps_smmu 0x140 0xf>;
2367 reg = <0x0 0x23040000 0x0 0x10000>,
2368 <0x0 0x23056000 0x0 0x100>;
2388 iommus = <&apps_smmu 0x120 0xf>;
2410 reg = <0x0 0x01c00000 0x0 0x3000>,
2411 <0x0 0x40000000 0x0 0xf20>,
2412 <0x0 0x40000f20 0x0 0xa8>,
2413 <0x0 0x40001000 0x0 0x4000>,
2414 <0x0 0x40100000 0x0 0x100000>,
2415 <0x0 0x01c03000 0x0 0x1000>;
2421 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
2422 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
2423 bus-range = <0x00 0xff>;
2427 linux,pci-domain = <0>;
2441 interrupt-map-mask = <0 0 0 0x7>;
2442 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
2443 <0 0 0 2 &intc GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
2444 <0 0 0 3 &intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
2445 <0 0 0 4 &intc GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
2462 interconnects = <&pcie_anoc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>,
2463 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>;
2466 iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
2467 <0x100 &pcie_smmu 0x0001 0x1>;
2481 reg = <0x0 0x1c04000 0x0 0x2000>;
2500 #clock-cells = <0>;
2503 #phy-cells = <0>;
2510 reg = <0x0 0x01c10000 0x0 0x3000>,
2511 <0x0 0x60000000 0x0 0xf20>,
2512 <0x0 0x60000f20 0x0 0xa8>,
2513 <0x0 0x60001000 0x0 0x4000>,
2514 <0x0 0x60100000 0x0 0x100000>,
2515 <0x0 0x01c13000 0x0 0x1000>;
2521 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
2522 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x1fd00000>;
2523 bus-range = <0x00 0xff>;
2541 interrupt-map-mask = <0 0 0 0x7>;
2542 interrupt-map = <0 0 0 1 &intc GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2543 <0 0 0 2 &intc GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2544 <0 0 0 3 &intc GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
2545 <0 0 0 4 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
2562 interconnects = <&pcie_anoc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI1 0>,
2563 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>;
2566 iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
2567 <0x100 &pcie_smmu 0x0081 0x1>;
2581 reg = <0x0 0x1c14000 0x0 0x4000>;
2600 #clock-cells = <0>;
2603 #phy-cells = <0>;