Lines Matching +full:0 +full:x0b011000
26 #clock-cells = <0>;
32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0>;
48 reg = <0x1>;
59 reg = <0x2>;
70 reg = <0x3>;
81 reg = <0x100>;
92 reg = <0x101>;
103 reg = <0x102>;
114 reg = <0x103>;
163 little_cpu_sleep_0: cpu-sleep-0-0 {
166 arm,psci-suspend-param = <0x40000003>;
173 big_cpu_sleep_0: cpu-sleep-1-0 {
176 arm,psci-suspend-param = <0x00000002>;
185 arm,psci-suspend-param = <0x40000003>;
215 qcom,dload-mode = <&tcsr 0x6100>;
222 reg = <0x0 0x80000000 0x0 0x0>;
240 qcom,ipc = <&apcs 8 0>;
317 reg = <0x0 0x85b00000 0x0 0x500000>;
323 reg = <0x0 0x86300000 0x0 0x100000>;
331 reg = <0x0 0x86400000 0x0 0x800000>;
336 reg = <0x0 0x86c00000 0x0 0x5600000>;
341 reg = <0x0 0x8c200000 0x0 0x1800000>;
346 reg = <0x0 0x8da00000 0x0 0x2600000>;
351 reg = <0x0 0x8dd00000 0x0 0x1400000>;
361 qcom,local-pid = <0>;
384 qcom,local-pid = <0>;
407 qcom,local-pid = <0>;
429 #size-cells = <0>;
435 apps_smsm: apps@0 {
436 reg = <0>;
457 soc: soc@0 {
460 ranges = <0 0 0 0xffffffff>;
465 reg = <0x00022000 0x140>;
472 reg = <0x00060000 0x8000>;
477 reg = <0x0006c000 0x200>;
478 #phy-cells = <0>;
491 reg = <0x000a4000 0x1000>;
496 reg = <0x218 1>;
497 bits = <0 8>;
501 reg = <0x219 0x1>;
502 bits = <0 6>;
506 reg = <0x219 0x2>;
511 reg = <0x21a 0x2>;
516 reg = <0x21b 0x1>;
521 reg = <0x21c 0x1>;
522 bits = <0 6>;
526 reg = <0x21c 0x2>;
531 reg = <0x21d 0x2>;
536 reg = <0x21e 0x1>;
541 reg = <0x220 1>;
542 bits = <0 8>;
546 reg = <0x221 0x1>;
547 bits = <0 6>;
551 reg = <0x221 0x2>;
556 reg = <0x222 0x2>;
561 reg = <0x224 0x1>;
566 reg = <0x224 0x1>;
567 bits = <0 6>;
571 reg = <0x224 0x2>;
576 reg = <0x225 0x2>;
581 reg = <0x226 0x2>;
586 reg = <0x228 1>;
587 bits = <0 3>;
591 reg = <0x228 0x2>;
596 reg = <0x229 0x1>;
601 reg = <0x229 0x2>;
606 reg = <0x22a 0x2>;
611 reg = <0x22b 0x2>;
616 reg = <0x22c 0x1>;
623 reg = <0x004a9000 0x1000>, /* TM */
624 <0x004a8000 0x1000>; /* SROT */
659 reg = <0x01000000 0x300000>;
663 gpio-ranges = <&tlmm 0 0 145>;
773 reg = <0x01800000 0x80000>;
783 <0>,
784 <0>,
785 <0>,
786 <0>;
797 reg = <0x01905000 0x20000>;
803 reg = <0x01937000 0x30000>;
808 reg = <0x0200f000 0x1000>,
809 <0x02400000 0x800000>,
810 <0x02c00000 0x800000>,
811 <0x03800000 0x200000>,
812 <0x0200a000 0x2100>;
816 qcom,channel = <0>;
817 qcom,ee = <0>;
820 #size-cells = <0>;
827 reg = <0x07824900 0x500>, <0x07824000 0x800>;
843 reg = <0x07864900 0x11c>, <0x07864000 0x800>;
859 reg = <0x07884000 0x1f000>;
864 qcom,ee = <0>;
869 reg = <0x078af000 0x200>;
873 dmas = <&blsp1_dma 0>, <&blsp1_dma 1>;
880 reg = <0x078b0000 0x200>;
891 reg = <0x078b5000 0x500>;
898 pinctrl-0 = <&spi1_default>;
901 #size-cells = <0>;
907 reg = <0x078b6000 0x500>;
915 pinctrl-0 = <&blsp1_i2c2_default>;
918 #size-cells = <0>;
924 reg = <0x078b8000 0x500>;
932 pinctrl-0 = <&blsp1_i2c4_default>;
935 #size-cells = <0>;
941 reg = <0x078db000 0x200>,
942 <0x078db200 0x200>;
951 ahb-burst-config = <0>;
962 reg = <0x07a24900 0x11c>, <0x07a24000 0x800>;
979 reg = <0x07ac4000 0x1f000>;
984 qcom,ee = <0>;
989 reg = <0x07af0000 0x200>;
993 dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
1000 reg = <0x07af6000 0x600>;
1008 pinctrl-0 = <&blsp2_i2c2_default>;
1011 #size-cells = <0>;
1017 reg = <0x07af8000 0x600>;
1025 pinctrl-0 = <&blsp2_i2c4_default>;
1028 #size-cells = <0>;
1034 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
1042 reg = <0x0b011000 0x1000>;
1048 reg = <0x0b120000 0x1000>;
1055 reg = <0x0b121000 0x1000>, <0x0b122000 0x1000>;
1058 frame-number = <0>;
1062 reg = <0x0b123000 0x1000>;
1069 reg = <0x0b124000 0x1000>;
1076 reg = <0x0b125000 0x1000>;
1083 reg = <0x0b126000 0x1000>;
1090 reg = <0x0b127000 0x1000>;
1097 reg = <0x0b128000 0x1000>;
1106 reg = <0x08600000 0x1000>;
1110 ranges = <0 0x08600000 0x1000>;
1114 reg = <0x94c 0xc8>;
1124 thermal-sensors = <&tsens 0>;