Lines Matching +full:msm8916 +full:- +full:rpmpd
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <2>;
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 tz-apps@86000000 {
36 no-map;
42 no-map;
45 qcom,rpm-msg-ram = <&rpm_msg_ram>;
50 no-map;
55 no-map;
60 no-map;
64 compatible = "qcom,rmtfs-mem";
66 no-map;
68 qcom,client-id = <1>;
73 no-map;
78 no-map;
83 no-map;
88 no-map;
92 no-map;
98 xo_board: xo-board {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <19200000>;
104 sleep_clk: sleep-clk {
105 compatible = "fixed-clock";
106 #clock-cells = <0>;
107 clock-frequency = <32768>;
112 #address-cells = <1>;
113 #size-cells = <0>;
117 compatible = "arm,cortex-a53";
119 next-level-cache = <&L2_0>;
120 enable-method = "psci";
122 operating-points-v2 = <&cpu_opp_table>;
123 #cooling-cells = <2>;
124 power-domains = <&CPU_PD0>;
125 power-domain-names = "psci";
132 compatible = "arm,cortex-a53";
134 next-level-cache = <&L2_0>;
135 enable-method = "psci";
137 operating-points-v2 = <&cpu_opp_table>;
138 #cooling-cells = <2>;
139 power-domains = <&CPU_PD1>;
140 power-domain-names = "psci";
147 compatible = "arm,cortex-a53";
149 next-level-cache = <&L2_0>;
150 enable-method = "psci";
152 operating-points-v2 = <&cpu_opp_table>;
153 #cooling-cells = <2>;
154 power-domains = <&CPU_PD2>;
155 power-domain-names = "psci";
162 compatible = "arm,cortex-a53";
164 next-level-cache = <&L2_0>;
165 enable-method = "psci";
167 operating-points-v2 = <&cpu_opp_table>;
168 #cooling-cells = <2>;
169 power-domains = <&CPU_PD3>;
170 power-domain-names = "psci";
175 L2_0: l2-cache {
177 cache-level = <2>;
178 cache-unified;
181 idle-states {
182 entry-method = "psci";
184 CPU_SLEEP_0: cpu-sleep-0 {
185 compatible = "arm,idle-state";
186 idle-state-name = "standalone-power-collapse";
187 arm,psci-suspend-param = <0x40000002>;
188 entry-latency-us = <130>;
189 exit-latency-us = <150>;
190 min-residency-us = <2000>;
191 local-timer-stop;
195 domain-idle-states {
197 CLUSTER_RET: cluster-retention {
198 compatible = "domain-idle-state";
199 arm,psci-suspend-param = <0x41000012>;
200 entry-latency-us = <500>;
201 exit-latency-us = <500>;
202 min-residency-us = <2000>;
205 CLUSTER_PWRDN: cluster-gdhs {
206 compatible = "domain-idle-state";
207 arm,psci-suspend-param = <0x41000032>;
208 entry-latency-us = <2000>;
209 exit-latency-us = <2000>;
210 min-residency-us = <6000>;
215 cpu_opp_table: opp-table-cpu {
216 compatible = "operating-points-v2";
217 opp-shared;
219 opp-200000000 {
220 opp-hz = /bits/ 64 <200000000>;
222 opp-400000000 {
223 opp-hz = /bits/ 64 <400000000>;
225 opp-800000000 {
226 opp-hz = /bits/ 64 <800000000>;
228 opp-998400000 {
229 opp-hz = /bits/ 64 <998400000>;
235 compatible = "qcom,scm-msm8916", "qcom,scm";
239 clock-names = "core", "bus", "iface";
240 #reset-cells = <1>;
242 qcom,dload-mode = <&tcsr 0x6100>;
247 compatible = "arm,cortex-a53-pmu";
252 compatible = "arm,psci-1.0";
255 CPU_PD0: power-domain-cpu0 {
256 #power-domain-cells = <0>;
257 power-domains = <&CLUSTER_PD>;
258 domain-idle-states = <&CPU_SLEEP_0>;
261 CPU_PD1: power-domain-cpu1 {
262 #power-domain-cells = <0>;
263 power-domains = <&CLUSTER_PD>;
264 domain-idle-states = <&CPU_SLEEP_0>;
267 CPU_PD2: power-domain-cpu2 {
268 #power-domain-cells = <0>;
269 power-domains = <&CLUSTER_PD>;
270 domain-idle-states = <&CPU_SLEEP_0>;
273 CPU_PD3: power-domain-cpu3 {
274 #power-domain-cells = <0>;
275 power-domains = <&CLUSTER_PD>;
276 domain-idle-states = <&CPU_SLEEP_0>;
279 CLUSTER_PD: power-domain-cluster {
280 #power-domain-cells = <0>;
281 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
286 compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc";
288 smd-edge {
291 qcom,smd-edge = <15>;
293 rpm_requests: rpm-requests {
294 compatible = "qcom,rpm-msm8916";
295 qcom,smd-channels = "rpm_requests";
297 rpmcc: clock-controller {
298 compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
299 #clock-cells = <1>;
301 clock-names = "xo";
304 rpmpd: power-controller { label
305 compatible = "qcom,msm8916-rpmpd";
306 #power-domain-cells = <1>;
307 operating-points-v2 = <&rpmpd_opp_table>;
309 rpmpd_opp_table: opp-table {
310 compatible = "operating-points-v2";
313 opp-level = <1>;
316 opp-level = <2>;
319 opp-level = <3>;
322 opp-level = <4>;
325 opp-level = <5>;
328 opp-level = <6>;
336 smp2p-hexagon {
344 qcom,local-pid = <0>;
345 qcom,remote-pid = <1>;
347 hexagon_smp2p_out: master-kernel {
348 qcom,entry-name = "master-kernel";
350 #qcom,smem-state-cells = <1>;
353 hexagon_smp2p_in: slave-kernel {
354 qcom,entry-name = "slave-kernel";
356 interrupt-controller;
357 #interrupt-cells = <2>;
361 smp2p-wcnss {
369 qcom,local-pid = <0>;
370 qcom,remote-pid = <4>;
372 wcnss_smp2p_out: master-kernel {
373 qcom,entry-name = "master-kernel";
375 #qcom,smem-state-cells = <1>;
378 wcnss_smp2p_in: slave-kernel {
379 qcom,entry-name = "slave-kernel";
381 interrupt-controller;
382 #interrupt-cells = <2>;
389 #address-cells = <1>;
390 #size-cells = <0>;
392 qcom,ipc-1 = <&apcs 8 13>;
393 qcom,ipc-3 = <&apcs 8 19>;
398 #qcom,smem-state-cells = <1>;
405 interrupt-controller;
406 #interrupt-cells = <2>;
413 interrupt-controller;
414 #interrupt-cells = <2>;
419 #address-cells = <1>;
420 #size-cells = <1>;
422 compatible = "simple-bus";
428 clock-names = "core";
437 compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
439 #address-cells = <1>;
440 #size-cells = <1>;
447 tsens_s0_p1: s0-p1@d0 {
452 tsens_s0_p2: s0-p2@d1 {
457 tsens_s1_p1: s1-p1@d2 {
461 tsens_s1_p2: s1-p2@d2 {
465 tsens_s2_p1: s2-p1@d3 {
470 tsens_s2_p2: s2-p2@d4 {
477 tsens_s4_p1: s4-p1@d4 {
482 tsens_s4_p2: s4-p2@d5 {
487 tsens_s5_p1: s5-p1@d5 {
492 tsens_s5_p2: s5-p2@d6 {
509 compatible = "qcom,rpm-msg-ram";
514 compatible = "qcom,msm8916-rpm-stats";
519 compatible = "qcom,msm8916-bimc";
521 #interconnect-cells = <1>;
522 clock-names = "bus", "bus_a";
527 tsens: thermal-sensor@4a9000 {
528 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
533 nvmem-cells = <&tsens_mode>,
540 nvmem-cell-names = "mode",
549 interrupt-names = "uplow";
550 #thermal-sensor-cells = <1>;
554 compatible = "qcom,msm8916-pcnoc";
556 #interconnect-cells = <1>;
557 clock-names = "bus", "bus_a";
563 compatible = "qcom,msm8916-snoc";
565 #interconnect-cells = <1>;
566 clock-names = "bus", "bus_a";
572 compatible = "arm,coresight-stm", "arm,primecell";
575 reg-names = "stm-base", "stm-stimulus-base";
578 clock-names = "apb_pclk", "atclk";
582 out-ports {
585 remote-endpoint = <&funnel0_in7>;
592 /* CTI 0 - TMC connections */
594 compatible = "arm,coresight-cti", "arm,primecell";
598 clock-names = "apb_pclk";
603 /* CTI 1 - TPIU connections */
605 compatible = "arm,coresight-cti", "arm,primecell";
609 clock-names = "apb_pclk";
614 /* CTIs 2-11 - no information - not instantiated */
617 compatible = "arm,coresight-tpiu", "arm,primecell";
621 clock-names = "apb_pclk", "atclk";
625 in-ports {
628 remote-endpoint = <&replicator_out1>;
635 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
639 clock-names = "apb_pclk", "atclk";
643 in-ports {
644 #address-cells = <1>;
645 #size-cells = <0>;
649 * 0 - connected to Resource and Power Manger CPU ETM
650 * 1 - not-connected
651 * 2 - connected to Modem CPU ETM
652 * 3 - not-connected
653 * 5 - not-connected
654 * 6 - connected trought funnel to Wireless CPU ETM
655 * 7 - connected to STM component
661 remote-endpoint = <&funnel1_out>;
668 remote-endpoint = <&stm_out>;
673 out-ports {
676 remote-endpoint = <&etf_in>;
683 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
687 clock-names = "apb_pclk", "atclk";
691 out-ports {
692 #address-cells = <1>;
693 #size-cells = <0>;
698 remote-endpoint = <&etr_in>;
704 remote-endpoint = <&tpiu_in>;
709 in-ports {
712 remote-endpoint = <&etf_out>;
719 compatible = "arm,coresight-tmc", "arm,primecell";
723 clock-names = "apb_pclk", "atclk";
727 in-ports {
730 remote-endpoint = <&funnel0_out>;
735 out-ports {
738 remote-endpoint = <&replicator_in>;
745 compatible = "arm,coresight-tmc", "arm,primecell";
749 clock-names = "apb_pclk", "atclk";
753 in-ports {
756 remote-endpoint = <&replicator_out0>;
763 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
767 clock-names = "apb_pclk", "atclk";
771 in-ports {
772 #address-cells = <1>;
773 #size-cells = <0>;
778 remote-endpoint = <&etm0_out>;
784 remote-endpoint = <&etm1_out>;
790 remote-endpoint = <&etm2_out>;
796 remote-endpoint = <&etm3_out>;
801 out-ports {
804 remote-endpoint = <&funnel0_in4>;
811 compatible = "arm,coresight-cpu-debug", "arm,primecell";
814 clock-names = "apb_pclk";
820 compatible = "arm,coresight-cpu-debug", "arm,primecell";
823 clock-names = "apb_pclk";
829 compatible = "arm,coresight-cpu-debug", "arm,primecell";
832 clock-names = "apb_pclk";
838 compatible = "arm,coresight-cpu-debug", "arm,primecell";
841 clock-names = "apb_pclk";
846 /* Core CTIs; CTIs 12-15 */
847 /* CTI - CPU-0 */
849 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
854 clock-names = "apb_pclk";
857 arm,cs-dev-assoc = <&etm0>;
862 /* CTI - CPU-1 */
864 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
869 clock-names = "apb_pclk";
872 arm,cs-dev-assoc = <&etm1>;
877 /* CTI - CPU-2 */
879 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
884 clock-names = "apb_pclk";
887 arm,cs-dev-assoc = <&etm2>;
892 /* CTI - CPU-3 */
894 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
899 clock-names = "apb_pclk";
902 arm,cs-dev-assoc = <&etm3>;
908 compatible = "arm,coresight-etm4x", "arm,primecell";
912 clock-names = "apb_pclk", "atclk";
913 arm,coresight-loses-context-with-cpu;
919 out-ports {
922 remote-endpoint = <&funnel1_in0>;
929 compatible = "arm,coresight-etm4x", "arm,primecell";
933 clock-names = "apb_pclk", "atclk";
934 arm,coresight-loses-context-with-cpu;
940 out-ports {
943 remote-endpoint = <&funnel1_in1>;
950 compatible = "arm,coresight-etm4x", "arm,primecell";
954 clock-names = "apb_pclk", "atclk";
955 arm,coresight-loses-context-with-cpu;
961 out-ports {
964 remote-endpoint = <&funnel1_in2>;
971 compatible = "arm,coresight-etm4x", "arm,primecell";
975 clock-names = "apb_pclk", "atclk";
976 arm,coresight-loses-context-with-cpu;
982 out-ports {
985 remote-endpoint = <&funnel1_in3>;
992 compatible = "qcom,msm8916-pinctrl";
995 gpio-controller;
996 gpio-ranges = <&tlmm 0 0 122>;
997 #gpio-cells = <2>;
998 interrupt-controller;
999 #interrupt-cells = <2>;
1001 blsp_i2c1_default: blsp-i2c1-default-state {
1004 drive-strength = <2>;
1005 bias-disable;
1008 blsp_i2c1_sleep: blsp-i2c1-sleep-state {
1011 drive-strength = <2>;
1012 bias-disable;
1015 blsp_i2c2_default: blsp-i2c2-default-state {
1018 drive-strength = <2>;
1019 bias-disable;
1022 blsp_i2c2_sleep: blsp-i2c2-sleep-state {
1025 drive-strength = <2>;
1026 bias-disable;
1029 blsp_i2c3_default: blsp-i2c3-default-state {
1032 drive-strength = <2>;
1033 bias-disable;
1036 blsp_i2c3_sleep: blsp-i2c3-sleep-state {
1039 drive-strength = <2>;
1040 bias-disable;
1043 blsp_i2c4_default: blsp-i2c4-default-state {
1046 drive-strength = <2>;
1047 bias-disable;
1050 blsp_i2c4_sleep: blsp-i2c4-sleep-state {
1053 drive-strength = <2>;
1054 bias-disable;
1057 blsp_i2c5_default: blsp-i2c5-default-state {
1060 drive-strength = <2>;
1061 bias-disable;
1064 blsp_i2c5_sleep: blsp-i2c5-sleep-state {
1067 drive-strength = <2>;
1068 bias-disable;
1071 blsp_i2c6_default: blsp-i2c6-default-state {
1074 drive-strength = <2>;
1075 bias-disable;
1078 blsp_i2c6_sleep: blsp-i2c6-sleep-state {
1081 drive-strength = <2>;
1082 bias-disable;
1085 blsp_spi1_default: blsp-spi1-default-state {
1086 spi-pins {
1089 drive-strength = <12>;
1090 bias-disable;
1092 cs-pins {
1095 drive-strength = <16>;
1096 bias-disable;
1097 output-high;
1101 blsp_spi1_sleep: blsp-spi1-sleep-state {
1104 drive-strength = <2>;
1105 bias-pull-down;
1108 blsp_spi2_default: blsp-spi2-default-state {
1109 spi-pins {
1112 drive-strength = <12>;
1113 bias-disable;
1115 cs-pins {
1118 drive-strength = <16>;
1119 bias-disable;
1120 output-high;
1124 blsp_spi2_sleep: blsp-spi2-sleep-state {
1127 drive-strength = <2>;
1128 bias-pull-down;
1131 blsp_spi3_default: blsp-spi3-default-state {
1132 spi-pins {
1135 drive-strength = <12>;
1136 bias-disable;
1138 cs-pins {
1141 drive-strength = <16>;
1142 bias-disable;
1143 output-high;
1147 blsp_spi3_sleep: blsp-spi3-sleep-state {
1150 drive-strength = <2>;
1151 bias-pull-down;
1154 blsp_spi4_default: blsp-spi4-default-state {
1155 spi-pins {
1158 drive-strength = <12>;
1159 bias-disable;
1161 cs-pins {
1164 drive-strength = <16>;
1165 bias-disable;
1166 output-high;
1170 blsp_spi4_sleep: blsp-spi4-sleep-state {
1173 drive-strength = <2>;
1174 bias-pull-down;
1177 blsp_spi5_default: blsp-spi5-default-state {
1178 spi-pins {
1181 drive-strength = <12>;
1182 bias-disable;
1184 cs-pins {
1187 drive-strength = <16>;
1188 bias-disable;
1189 output-high;
1193 blsp_spi5_sleep: blsp-spi5-sleep-state {
1196 drive-strength = <2>;
1197 bias-pull-down;
1200 blsp_spi6_default: blsp-spi6-default-state {
1201 spi-pins {
1204 drive-strength = <12>;
1205 bias-disable;
1207 cs-pins {
1210 drive-strength = <16>;
1211 bias-disable;
1212 output-high;
1216 blsp_spi6_sleep: blsp-spi6-sleep-state {
1219 drive-strength = <2>;
1220 bias-pull-down;
1223 blsp_uart1_default: blsp-uart1-default-state {
1227 drive-strength = <16>;
1228 bias-disable;
1231 blsp_uart1_sleep: blsp-uart1-sleep-state {
1234 drive-strength = <2>;
1235 bias-pull-down;
1238 blsp_uart2_default: blsp-uart2-default-state {
1241 drive-strength = <16>;
1242 bias-disable;
1245 blsp_uart2_sleep: blsp-uart2-sleep-state {
1248 drive-strength = <2>;
1249 bias-pull-down;
1252 camera_front_default: camera-front-default-state {
1253 pwdn-pins {
1256 drive-strength = <16>;
1257 bias-disable;
1259 rst-pins {
1262 drive-strength = <16>;
1263 bias-disable;
1265 mclk1-pins {
1268 drive-strength = <16>;
1269 bias-disable;
1273 camera_rear_default: camera-rear-default-state {
1274 pwdn-pins {
1277 drive-strength = <16>;
1278 bias-disable;
1280 rst-pins {
1283 drive-strength = <16>;
1284 bias-disable;
1286 mclk0-pins {
1289 drive-strength = <16>;
1290 bias-disable;
1294 cci0_default: cci0-default-state {
1297 drive-strength = <16>;
1298 bias-disable;
1301 cdc_dmic_default: cdc-dmic-default-state {
1302 clk-pins {
1305 drive-strength = <8>;
1307 data-pins {
1310 drive-strength = <8>;
1314 cdc_dmic_sleep: cdc-dmic-sleep-state {
1315 clk-pins {
1318 drive-strength = <2>;
1319 bias-disable;
1321 data-pins {
1324 drive-strength = <2>;
1325 bias-disable;
1329 cdc_pdm_default: cdc-pdm-default-state {
1333 drive-strength = <8>;
1334 bias-disable;
1337 cdc_pdm_sleep: cdc-pdm-sleep-state {
1341 drive-strength = <2>;
1342 bias-pull-down;
1345 pri_mi2s_default: mi2s-pri-default-state {
1348 drive-strength = <8>;
1349 bias-disable;
1352 pri_mi2s_sleep: mi2s-pri-sleep-state {
1355 drive-strength = <2>;
1356 bias-disable;
1359 pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
1362 drive-strength = <8>;
1363 bias-disable;
1366 pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
1369 drive-strength = <2>;
1370 bias-disable;
1373 pri_mi2s_ws_default: mi2s-pri-ws-default-state {
1376 drive-strength = <8>;
1377 bias-disable;
1380 pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
1383 drive-strength = <2>;
1384 bias-disable;
1387 sec_mi2s_default: mi2s-sec-default-state {
1390 drive-strength = <8>;
1391 bias-disable;
1394 sec_mi2s_sleep: mi2s-sec-sleep-state {
1397 drive-strength = <2>;
1398 bias-disable;
1401 sdc1_default: sdc1-default-state {
1402 clk-pins {
1404 bias-disable;
1405 drive-strength = <16>;
1407 cmd-pins {
1409 bias-pull-up;
1410 drive-strength = <10>;
1412 data-pins {
1414 bias-pull-up;
1415 drive-strength = <10>;
1419 sdc1_sleep: sdc1-sleep-state {
1420 clk-pins {
1422 bias-disable;
1423 drive-strength = <2>;
1425 cmd-pins {
1427 bias-pull-up;
1428 drive-strength = <2>;
1430 data-pins {
1432 bias-pull-up;
1433 drive-strength = <2>;
1437 sdc2_default: sdc2-default-state {
1438 clk-pins {
1440 bias-disable;
1441 drive-strength = <16>;
1443 cmd-pins {
1445 bias-pull-up;
1446 drive-strength = <10>;
1448 data-pins {
1450 bias-pull-up;
1451 drive-strength = <10>;
1455 sdc2_sleep: sdc2-sleep-state {
1456 clk-pins {
1458 bias-disable;
1459 drive-strength = <2>;
1461 cmd-pins {
1463 bias-pull-up;
1464 drive-strength = <2>;
1466 data-pins {
1468 bias-pull-up;
1469 drive-strength = <2>;
1473 wcss_wlan_default: wcss-wlan-default-state {
1476 drive-strength = <6>;
1477 bias-pull-up;
1481 gcc: clock-controller@1800000 {
1482 compatible = "qcom,gcc-msm8916";
1483 #clock-cells = <1>;
1484 #reset-cells = <1>;
1485 #power-domain-cells = <1>;
1494 clock-names = "xo",
1504 compatible = "qcom,tcsr-mutex";
1506 #hwlock-cells = <1>;
1510 compatible = "qcom,tcsr-msm8916", "syscon";
1514 mdss: display-subsystem@1a00000 {
1519 reg-names = "mdss_phys", "vbif_phys";
1521 power-domains = <&gcc MDSS_GDSC>;
1526 clock-names = "iface",
1532 interrupt-controller;
1533 #interrupt-cells = <1>;
1535 #address-cells = <1>;
1536 #size-cells = <1>;
1539 mdss_mdp: display-controller@1a01000 {
1540 compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
1542 reg-names = "mdp_phys";
1544 interrupt-parent = <&mdss>;
1551 clock-names = "iface",
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1565 remote-endpoint = <&mdss_dsi0_in>;
1572 compatible = "qcom,msm8916-dsi-ctrl",
1573 "qcom,mdss-dsi-ctrl";
1575 reg-names = "dsi_ctrl";
1577 interrupt-parent = <&mdss>;
1580 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1582 assigned-clock-parents = <&mdss_dsi0_phy 0>,
1591 clock-names = "mdp_core",
1599 #address-cells = <1>;
1600 #size-cells = <0>;
1603 #address-cells = <1>;
1604 #size-cells = <0>;
1609 remote-endpoint = <&mdss_mdp_intf1_out>;
1622 compatible = "qcom,dsi-phy-28nm-lp";
1626 reg-names = "dsi_pll",
1630 #clock-cells = <1>;
1631 #phy-cells = <0>;
1635 clock-names = "iface", "ref";
1640 compatible = "qcom,msm8916-camss";
1650 reg-names = "csiphy0",
1665 interrupt-names = "csiphy0",
1671 power-domains = <&gcc VFE_GDSC>;
1691 clock-names = "top_ahb",
1713 #address-cells = <1>;
1714 #size-cells = <0>;
1727 compatible = "qcom,msm8916-cci", "qcom,msm8226-cci";
1728 #address-cells = <1>;
1729 #size-cells = <0>;
1736 clock-names = "camss_top_ahb", "cci_ahb",
1738 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1740 assigned-clock-rates = <80000000>, <19200000>;
1741 pinctrl-names = "default";
1742 pinctrl-0 = <&cci0_default>;
1745 cci_i2c0: i2c-bus@0 {
1747 clock-frequency = <400000>;
1748 #address-cells = <1>;
1749 #size-cells = <0>;
1754 compatible = "qcom,adreno-306.0", "qcom,adreno";
1756 reg-names = "kgsl_3d0_reg_memory";
1758 interrupt-names = "kgsl_3d0_irq";
1759 clock-names =
1773 power-domains = <&gcc OXILI_GDSC>;
1774 operating-points-v2 = <&gpu_opp_table>;
1777 gpu_opp_table: opp-table {
1778 compatible = "operating-points-v2";
1780 opp-400000000 {
1781 opp-hz = /bits/ 64 <400000000>;
1783 opp-19200000 {
1784 opp-hz = /bits/ 64 <19200000>;
1789 venus: video-codec@1d00000 {
1790 compatible = "qcom,msm8916-venus";
1793 power-domains = <&gcc VENUS_GDSC>;
1797 clock-names = "core", "iface", "bus";
1799 memory-region = <&venus_mem>;
1802 video-decoder {
1803 compatible = "venus-decoder";
1806 video-encoder {
1807 compatible = "venus-encoder";
1812 #address-cells = <1>;
1813 #size-cells = <1>;
1814 #iommu-cells = <1>;
1815 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1820 clock-names = "iface", "bus";
1821 qcom,iommu-secure-id = <17>;
1824 iommu-ctx@3000 {
1825 compatible = "qcom,msm-iommu-v1-sec";
1831 iommu-ctx@4000 {
1832 compatible = "qcom,msm-iommu-v1-ns";
1838 iommu-ctx@5000 {
1839 compatible = "qcom,msm-iommu-v1-sec";
1846 #address-cells = <1>;
1847 #size-cells = <1>;
1848 #iommu-cells = <1>;
1849 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1853 clock-names = "iface", "bus";
1854 qcom,iommu-secure-id = <18>;
1857 iommu-ctx@1000 {
1858 compatible = "qcom,msm-iommu-v1-ns";
1864 iommu-ctx@2000 {
1865 compatible = "qcom,msm-iommu-v1-ns";
1872 compatible = "qcom,spmi-pmic-arb";
1878 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1879 interrupt-names = "periph_irq";
1883 #address-cells = <2>;
1884 #size-cells = <0>;
1885 interrupt-controller;
1886 #interrupt-cells = <4>;
1889 bam_dmux_dma: dma-controller@4044000 {
1890 compatible = "qcom,bam-v1.7.0";
1893 #dma-cells = <1>;
1896 num-channels = <6>;
1897 qcom,num-ees = <1>;
1898 qcom,powered-remotely;
1904 compatible = "qcom,msm8916-mss-pil";
1908 reg-names = "qdsp6", "rmb";
1910 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1915 interrupt-names = "wdog", "fatal", "ready",
1916 "handover", "stop-ack";
1918 power-domains = <&rpmpd MSM8916_VDDCX>,
1919 <&rpmpd MSM8916_VDDMX>;
1920 power-domain-names = "cx", "mx";
1926 clock-names = "iface", "bus", "mem", "xo";
1928 qcom,smem-states = <&hexagon_smp2p_out 0>;
1929 qcom,smem-state-names = "stop";
1932 reset-names = "mss_restart";
1934 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1939 memory-region = <&mba_mem>;
1943 memory-region = <&mpss_mem>;
1946 bam_dmux: bam-dmux {
1947 compatible = "qcom,bam-dmux";
1949 interrupt-parent = <&hexagon_smsm>;
1951 interrupt-names = "pc", "pc-ack";
1953 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1954 qcom,smem-state-names = "pc", "pc-ack";
1957 dma-names = "tx", "rx";
1962 smd-edge {
1965 qcom,smd-edge = <0>;
1967 qcom,remote-pid = <1>;
1973 qcom,smd-channels = "fastrpcsmd-apps-dsp";
1975 qcom,non-secure-domain;
1977 #address-cells = <1>;
1978 #size-cells = <0>;
1981 compatible = "qcom,fastrpc-compute-cb";
1990 compatible = "qcom,apq8016-sbc-sndcard";
1992 reg-names = "mic-iomux", "spkr-iomux";
1995 lpass: audio-controller@7708000 {
1997 compatible = "qcom,apq8016-lpass-cpu";
2012 clock-names = "ahbix-clk",
2013 "mi2s-bit-clk0",
2014 "mi2s-bit-clk1",
2015 "mi2s-bit-clk2",
2016 "mi2s-bit-clk3",
2017 "pcnoc-mport-clk",
2018 "pcnoc-sway-clk";
2019 #sound-dai-cells = <1>;
2022 interrupt-names = "lpass-irq-lpaif";
2024 reg-names = "lpass-lpaif";
2026 #address-cells = <1>;
2027 #size-cells = <0>;
2030 lpass_codec: audio-codec@771c000 {
2031 compatible = "qcom,msm8916-wcd-digital-codec";
2035 clock-names = "ahbix-clk", "mclk";
2036 #sound-dai-cells = <1>;
2041 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2043 reg-names = "hc", "core";
2047 interrupt-names = "hc_irq", "pwr_irq";
2051 clock-names = "iface", "core", "xo";
2052 pinctrl-0 = <&sdc1_default>;
2053 pinctrl-1 = <&sdc1_sleep>;
2054 pinctrl-names = "default", "sleep";
2055 mmc-ddr-1_8v;
2056 bus-width = <8>;
2057 non-removable;
2062 compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
2064 reg-names = "hc", "core";
2068 interrupt-names = "hc_irq", "pwr_irq";
2072 clock-names = "iface", "core", "xo";
2073 pinctrl-0 = <&sdc2_default>;
2074 pinctrl-1 = <&sdc2_sleep>;
2075 pinctrl-names = "default", "sleep";
2076 bus-width = <4>;
2080 blsp_dma: dma-controller@7884000 {
2081 compatible = "qcom,bam-v1.7.0";
2085 clock-names = "bam_clk";
2086 #dma-cells = <1>;
2088 qcom,controlled-remotely;
2092 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2096 clock-names = "core", "iface";
2098 dma-names = "tx", "rx";
2099 pinctrl-names = "default", "sleep";
2100 pinctrl-0 = <&blsp_uart1_default>;
2101 pinctrl-1 = <&blsp_uart1_sleep>;
2106 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2110 clock-names = "core", "iface";
2112 dma-names = "tx", "rx";
2113 pinctrl-names = "default", "sleep";
2114 pinctrl-0 = <&blsp_uart2_default>;
2115 pinctrl-1 = <&blsp_uart2_sleep>;
2120 compatible = "qcom,i2c-qup-v2.2.1";
2125 clock-names = "core", "iface";
2127 dma-names = "tx", "rx";
2128 pinctrl-names = "default", "sleep";
2129 pinctrl-0 = <&blsp_i2c1_default>;
2130 pinctrl-1 = <&blsp_i2c1_sleep>;
2131 #address-cells = <1>;
2132 #size-cells = <0>;
2137 compatible = "qcom,spi-qup-v2.2.1";
2142 clock-names = "core", "iface";
2144 dma-names = "tx", "rx";
2145 pinctrl-names = "default", "sleep";
2146 pinctrl-0 = <&blsp_spi1_default>;
2147 pinctrl-1 = <&blsp_spi1_sleep>;
2148 #address-cells = <1>;
2149 #size-cells = <0>;
2154 compatible = "qcom,i2c-qup-v2.2.1";
2159 clock-names = "core", "iface";
2161 dma-names = "tx", "rx";
2162 pinctrl-names = "default", "sleep";
2163 pinctrl-0 = <&blsp_i2c2_default>;
2164 pinctrl-1 = <&blsp_i2c2_sleep>;
2165 #address-cells = <1>;
2166 #size-cells = <0>;
2171 compatible = "qcom,spi-qup-v2.2.1";
2176 clock-names = "core", "iface";
2178 dma-names = "tx", "rx";
2179 pinctrl-names = "default", "sleep";
2180 pinctrl-0 = <&blsp_spi2_default>;
2181 pinctrl-1 = <&blsp_spi2_sleep>;
2182 #address-cells = <1>;
2183 #size-cells = <0>;
2188 compatible = "qcom,i2c-qup-v2.2.1";
2193 clock-names = "core", "iface";
2195 dma-names = "tx", "rx";
2196 pinctrl-names = "default", "sleep";
2197 pinctrl-0 = <&blsp_i2c3_default>;
2198 pinctrl-1 = <&blsp_i2c3_sleep>;
2199 #address-cells = <1>;
2200 #size-cells = <0>;
2205 compatible = "qcom,spi-qup-v2.2.1";
2210 clock-names = "core", "iface";
2212 dma-names = "tx", "rx";
2213 pinctrl-names = "default", "sleep";
2214 pinctrl-0 = <&blsp_spi3_default>;
2215 pinctrl-1 = <&blsp_spi3_sleep>;
2216 #address-cells = <1>;
2217 #size-cells = <0>;
2222 compatible = "qcom,i2c-qup-v2.2.1";
2227 clock-names = "core", "iface";
2229 dma-names = "tx", "rx";
2230 pinctrl-names = "default", "sleep";
2231 pinctrl-0 = <&blsp_i2c4_default>;
2232 pinctrl-1 = <&blsp_i2c4_sleep>;
2233 #address-cells = <1>;
2234 #size-cells = <0>;
2239 compatible = "qcom,spi-qup-v2.2.1";
2244 clock-names = "core", "iface";
2246 dma-names = "tx", "rx";
2247 pinctrl-names = "default", "sleep";
2248 pinctrl-0 = <&blsp_spi4_default>;
2249 pinctrl-1 = <&blsp_spi4_sleep>;
2250 #address-cells = <1>;
2251 #size-cells = <0>;
2256 compatible = "qcom,i2c-qup-v2.2.1";
2261 clock-names = "core", "iface";
2263 dma-names = "tx", "rx";
2264 pinctrl-names = "default", "sleep";
2265 pinctrl-0 = <&blsp_i2c5_default>;
2266 pinctrl-1 = <&blsp_i2c5_sleep>;
2267 #address-cells = <1>;
2268 #size-cells = <0>;
2273 compatible = "qcom,spi-qup-v2.2.1";
2278 clock-names = "core", "iface";
2280 dma-names = "tx", "rx";
2281 pinctrl-names = "default", "sleep";
2282 pinctrl-0 = <&blsp_spi5_default>;
2283 pinctrl-1 = <&blsp_spi5_sleep>;
2284 #address-cells = <1>;
2285 #size-cells = <0>;
2290 compatible = "qcom,i2c-qup-v2.2.1";
2295 clock-names = "core", "iface";
2297 dma-names = "tx", "rx";
2298 pinctrl-names = "default", "sleep";
2299 pinctrl-0 = <&blsp_i2c6_default>;
2300 pinctrl-1 = <&blsp_i2c6_sleep>;
2301 #address-cells = <1>;
2302 #size-cells = <0>;
2307 compatible = "qcom,spi-qup-v2.2.1";
2312 clock-names = "core", "iface";
2314 dma-names = "tx", "rx";
2315 pinctrl-names = "default", "sleep";
2316 pinctrl-0 = <&blsp_spi6_default>;
2317 pinctrl-1 = <&blsp_spi6_sleep>;
2318 #address-cells = <1>;
2319 #size-cells = <0>;
2324 compatible = "qcom,ci-hdrc";
2331 clock-names = "iface", "core";
2332 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
2333 assigned-clock-rates = <80000000>;
2335 reset-names = "core";
2338 hnp-disable;
2339 srp-disable;
2340 adp-disable;
2341 ahb-burst-config = <0>;
2342 phy-names = "usb-phy";
2345 #reset-cells = <1>;
2349 compatible = "qcom,usb-hs-phy-msm8916",
2350 "qcom,usb-hs-phy";
2351 #phy-cells = <0>;
2353 clock-names = "ref", "sleep";
2355 reset-names = "phy", "por";
2356 qcom,init-seq = /bits/ 8 <0x0 0x44>,
2365 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
2367 reg-names = "ccu", "dxe", "pmu";
2369 memory-region = <&wcnss_mem>;
2371 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
2376 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
2378 power-domains = <&rpmpd MSM8916_VDDCX>,
2379 <&rpmpd MSM8916_VDDMX>;
2380 power-domain-names = "cx", "mx";
2382 qcom,smem-states = <&wcnss_smp2p_out 0>;
2383 qcom,smem-state-names = "stop";
2385 pinctrl-names = "default";
2386 pinctrl-0 = <&wcss_wlan_default>;
2391 /* Separate chip, compatible is board-specific */
2393 clock-names = "xo";
2396 smd-edge {
2400 qcom,smd-edge = <6>;
2401 qcom,remote-pid = <4>;
2407 qcom,smd-channels = "WCNSS_CTRL";
2412 compatible = "qcom,wcnss-bt";
2416 compatible = "qcom,wcnss-wlan";
2420 interrupt-names = "tx", "rx";
2422 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
2423 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
2429 intc: interrupt-controller@b000000 {
2430 compatible = "qcom,msm-qgic2";
2431 interrupt-controller;
2432 #interrupt-cells = <3>;
2439 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
2441 #mbox-cells = <1>;
2443 clock-names = "pll", "aux";
2444 #clock-cells = <0>;
2448 compatible = "qcom,msm8916-a53pll";
2450 #clock-cells = <0>;
2452 clock-names = "xo";
2456 #address-cells = <1>;
2457 #size-cells = <1>;
2459 compatible = "arm,armv7-timer-mem";
2461 clock-frequency = <19200000>;
2464 frame-number = <0>;
2472 frame-number = <1>;
2479 frame-number = <2>;
2486 frame-number = <3>;
2493 frame-number = <4>;
2500 frame-number = <5>;
2507 frame-number = <6>;
2514 cpu0_acc: power-manager@b088000 {
2515 compatible = "qcom,msm8916-acc";
2520 cpu0_saw: power-manager@b089000 {
2521 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2526 cpu1_acc: power-manager@b098000 {
2527 compatible = "qcom,msm8916-acc";
2532 cpu1_saw: power-manager@b099000 {
2533 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2538 cpu2_acc: power-manager@b0a8000 {
2539 compatible = "qcom,msm8916-acc";
2544 cpu2_saw: power-manager@b0a9000 {
2545 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2550 cpu3_acc: power-manager@b0b8000 {
2551 compatible = "qcom,msm8916-acc";
2556 cpu3_saw: power-manager@b0b9000 {
2557 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2563 thermal-zones {
2564 cpu0-1-thermal {
2565 polling-delay-passive = <250>;
2566 polling-delay = <1000>;
2568 thermal-sensors = <&tsens 5>;
2571 cpu0_1_alert0: trip-point0 {
2576 cpu0_1_crit: cpu-crit {
2583 cooling-maps {
2586 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2594 cpu2-3-thermal {
2595 polling-delay-passive = <250>;
2596 polling-delay = <1000>;
2598 thermal-sensors = <&tsens 4>;
2601 cpu2_3_alert0: trip-point0 {
2606 cpu2_3_crit: cpu-crit {
2613 cooling-maps {
2616 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2624 gpu-thermal {
2625 polling-delay-passive = <250>;
2626 polling-delay = <1000>;
2628 thermal-sensors = <&tsens 2>;
2631 gpu_alert0: trip-point0 {
2636 gpu_crit: gpu-crit {
2644 camera-thermal {
2645 polling-delay-passive = <250>;
2646 polling-delay = <1000>;
2648 thermal-sensors = <&tsens 1>;
2651 cam_alert0: trip-point0 {
2659 modem-thermal {
2660 polling-delay-passive = <250>;
2661 polling-delay = <1000>;
2663 thermal-sensors = <&tsens 0>;
2666 modem_alert0: trip-point0 {
2676 compatible = "arm,armv8-timer";