Lines Matching +full:0 +full:x02c00000
21 #clock-cells = <0>;
27 #clock-cells = <0>;
33 #size-cells = <0>;
35 CPU0: cpu@0 {
38 reg = <0x0>;
47 reg = <0x1>;
55 reg = <0x2>;
63 reg = <0x3>;
90 reg = <0x0 0x4a600000 0x0 0x400000>;
95 reg = <0x0 0x4aa00000 0x0 0x100000>;
101 reg = <0x0 0x4ab00000 0x0 0x100000>;
108 reg = <0x0 0x4ac00000 0x0 0x400000>;
116 qcom,dload-mode = <&tcsr 0x6100>;
120 soc: soc@0 {
123 ranges = <0 0 0 0xffffffff>;
128 reg = <0x00058000 0x1c4>;
144 reg = <0x00058200 0x130>, /* Tx */
145 <0x00058400 0x200>, /* Rx */
146 <0x00058800 0x1f8>, /* PCS */
147 <0x00058600 0x044>; /* PCS misc */
148 #phy-cells = <0>;
149 #clock-cells = <0>;
158 reg = <0x00059000 0x180>;
159 #phy-cells = <0>;
171 reg = <0x00078000 0x1c4>;
187 reg = <0x00078200 0x130>, /* Tx */
188 <0x00078400 0x200>, /* Rx */
189 <0x00078800 0x1f8>, /* PCS */
190 <0x00078600 0x044>; /* PCS misc */
191 #phy-cells = <0>;
192 #clock-cells = <0>;
201 reg = <0x00079000 0x180>;
202 #phy-cells = <0>;
214 reg = <0x00084000 0x1bc>;
229 reg = <0x84200 0x16c>,
230 <0x84400 0x200>,
231 <0x84800 0x1f0>,
232 <0x84c00 0xf4>;
233 #phy-cells = <0>;
234 #clock-cells = <0>;
243 reg = <0x0008e000 0x1c4>;
258 reg = <0x8e200 0x130>,
259 <0x8e400 0x200>,
260 <0x8e800 0x1f8>;
261 #phy-cells = <0>;
262 #clock-cells = <0>;
271 reg = <0x00090000 0x64>;
273 #size-cells = <0>;
283 reg = <0x000a4000 0x2000>;
290 reg = <0x000e3000 0x1000>;
298 reg = <0x4a9000 0x1000>, /* TM */
299 <0x4a8000 0x1000>; /* SROT */
308 reg = <0x00704000 0x20000>;
320 reg = <0x0073a000 0x6000>;
332 reg = <0x01000000 0x300000>;
335 gpio-ranges = <&tlmm 0 0 70>;
347 i2c_0_pins: i2c-0-state {
354 spi_0_pins: spi-0-state {
382 reg = <0x01800000 0x80000>;
392 reg = <0x01905000 0x20000>;
398 reg = <0x01937000 0x21000>;
403 reg = <0x0200f000 0x001000>,
404 <0x02400000 0x800000>,
405 <0x02c00000 0x800000>,
406 <0x03800000 0x200000>,
407 <0x0200a000 0x000700>;
411 qcom,ee = <0>;
412 qcom,channel = <0>;
414 #size-cells = <0>;
421 reg = <0x7824900 0x500>, <0x7824000 0x800>;
444 reg = <0x07884000 0x2b000>;
449 qcom,ee = <0>;
454 reg = <0x078af000 0x200>;
464 reg = <0x078b1000 0x200>;
472 pinctrl-0 = <&hsuart_pins>;
479 reg = <0x078b3000 0x200>;
484 pinctrl-0 = <&serial_4_pins>;
492 #size-cells = <0>;
493 reg = <0x078b5000 0x600>;
500 pinctrl-0 = <&spi_0_pins>;
508 #size-cells = <0>;
509 reg = <0x078b6000 0x600>;
517 pinctrl-0 = <&i2c_0_pins>;
525 #size-cells = <0>;
526 reg = <0x078b7000 0x600>;
540 #size-cells = <0>;
541 reg = <0x78b9000 0x600>;
555 #size-cells = <0>;
556 reg = <0x78b9000 0x600>;
569 #size-cells = <0>;
570 reg = <0x078ba000 0x600>;
583 reg = <0x07984000 0x1a000>;
588 qcom,ee = <0>;
594 reg = <0x079b0000 0x10000>;
596 #size-cells = <0>;
601 dmas = <&qpic_bam 0>,
605 pinctrl-0 = <&qpic_pins>;
612 reg = <0x08af8800 0x400>;
640 reg = <0x8a00000 0xcd00>;
646 snps,hird-threshold = /bits/ 8 <0x0>;
655 reg = <0x08cf8800 0x400>;
683 reg = <0x8c00000 0xcd00>;
689 snps,hird-threshold = /bits/ 8 <0x0>;
702 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
703 ranges = <0 0xb00a000 0xffd>;
705 v2m@0 {
708 reg = <0x0 0xffd>;
714 reg = <0xb017000 0x1000>;
723 reg = <0x0b111000 0x1000>;
733 reg = <0x0b116000 0x40>;
734 #clock-cells = <0>;
744 reg = <0x0b120000 0x1000>;
747 frame-number = <0>;
750 reg = <0x0b121000 0x1000>,
751 <0x0b122000 0x1000>;
757 reg = <0x0b123000 0x1000>;
764 reg = <0x0b124000 0x1000>;
771 reg = <0x0b125000 0x1000>;
778 reg = <0x0b126000 0x1000>;
785 reg = <0x0b127000 0x1000>;
792 reg = <0x0b128000 0x1000>;
799 reg = <0x10000000 0xf1d>,
800 <0x10000f20 0xa8>,
801 <0x00088000 0x2000>,
802 <0x10100000 0x1000>;
806 bus-range = <0x00 0xff>;
815 ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
816 <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
821 interrupt-map-mask = <0 0 0 0x7>;
822 interrupt-map = <0 0 0 1 &intc 0 0 142
824 <0 0 0 2 &intc 0 0 143
826 <0 0 0 3 &intc 0 0 144
828 <0 0 0 4 &intc 0 0 145
860 reg = <0x20000000 0xf1d>,
861 <0x20000f20 0xa8>,
862 <0x20001000 0x1000>,
863 <0x00080000 0x4000>,
864 <0x20100000 0x1000>;
867 linux,pci-domain = <0>;
868 bus-range = <0x00 0xff>;
877 ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
878 <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
883 interrupt-map-mask = <0 0 0 0x7>;
884 interrupt-map = <0 0 0 1 &intc 0 0 75
886 <0 0 0 2 &intc 0 0 78
888 <0 0 0 3 &intc 0 0 79
890 <0 0 0 4 &intc 0 0 83
955 nss-0-crit {