dts/qcom/ipq5018.dtsi

1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
13 	interrupt-parent = <&intc>;
14 	#address-cells = <2>;
15 	#size-cells = <2>;
18 		sleep_clk: sleep-clk {
19 			compatible = "fixed-clock";
20 			#clock-cells = <0>;
23 		xo_board_clk: xo-board-clk {
24 			compatible = "fixed-clock";
25 			#clock-cells = <0>;
30 		#address-cells = <1>;
31 		#size-cells = <0>;
35 			compatible = "arm,cortex-a53";
37 			enable-method = "psci";
38 			next-level-cache = <&L2_0>;
43 			compatible = "arm,cortex-a53";
45 			enable-method = "psci";
46 			next-level-cache = <&L2_0>;
49 		L2_0: l2-cache {
51 			cache-level = <2>;
52 			cache-size = <0x80000>;
53 			cache-unified;
59 			compatible = "qcom,scm-ipq5018", "qcom,scm";
70 		compatible = "arm,cortex-a53-pmu";
75 		compatible = "arm,psci-1.0";
79 	reserved-memory {
80 		#address-cells = <2>;
81 		#size-cells = <2>;
86 			no-map;
91 		compatible = "simple-bus";
92 		#address-cells = <1>;
93 		#size-cells = <1>;
97 			compatible = "qcom,ipq5018-tlmm";
100 			gpio-controller;
101 			#gpio-cells = <2>;
102 			gpio-ranges = <&tlmm 0 0 47>;
103 			interrupt-controller;
104 			#interrupt-cells = <2>;
106 			uart1_pins: uart1-state {
109 				drive-strength = <8>;
110 				bias-pull-down;
114 		gcc: clock-controller@1800000 {
115 			compatible = "qcom,gcc-ipq5018";
126 			#clock-cells = <1>;
127 			#reset-cells = <1>;
128 			#power-domain-cells = <1>;
132 			compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
134 			reg-names = "hc";
138 			interrupt-names = "hc_irq", "pwr_irq";
143 			clock-names = "iface", "core", "xo";
144 			non-removable;
149 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
154 			clock-names = "core", "iface";
158 		intc: interrupt-controller@b000000 {
159 			compatible = "qcom,msm-qgic2";
165 			interrupt-controller;
166 			#interrupt-cells = <3>;
167 			#address-cells = <1>;
168 			#size-cells = <1>;
172 				compatible = "arm,gic-v2m-frame";
174 				msi-controller;
178 				compatible = "arm,gic-v2m-frame";
180 				msi-controller;
185 			compatible = "arm,armv7-timer-mem";
187 			#address-cells = <1>;
188 			#size-cells = <1>;
196 				frame-number = <0>;
202 				frame-number = <1>;
207 				frame-number = <2>;
216 				frame-number = <3>;
223 				frame-number = <4>;
230 				frame-number = <5>;
237 				frame-number = <6>;
244 		compatible = "arm,armv8-timer";