dts/mediatek/mt8365.dtsi

21 		#size-cells = <0>;
23 	cluster0_opp: opp-table-0 {
125 		cpu0: cpu@0 {
128 			reg = <0x0>;
132 			i-cache-size = <0x8000>;
135 			d-cache-size = <0x8000>;
148 			reg = <0x1>;
152 			i-cache-size = <0x8000>;
155 			d-cache-size = <0x8000>;
168 			reg = <0x2>;
172 			i-cache-size = <0x8000>;
175 			d-cache-size = <0x8000>;
188 			reg = <0x3>;
192 			i-cache-size = <0x8000>;
195 			d-cache-size = <0x8000>;
211 				arm,psci-suspend-param = <0x00010001>;
220 				arm,psci-suspend-param = <0x01010001>;
229 				arm,psci-suspend-param = <0x01010004>;
239 			cache-size = <0x80000>;
248 		#clock-cells = <0>;
269 			reg = <0 0x0c000000 0 0x10000>, /* GICD */
270 			      <0 0x0c080000 0 0x80000>, /* GICR */
271 			      <0 0x0c400000 0 0x2000>,  /* GICC */
272 			      <0 0x0c410000 0 0x1000>,  /* GICH */
273 			      <0 0x0c420000 0 0x2000>;  /* GICV */
280 			reg = <0 0x10000000 0 0x1000>;
286 			reg = <0 0x10001000 0 0x1000>;
292 			reg = <0 0x10003000 0 0x1000>;
298 			reg = <0 0x10005000 0 0x1000>;
303 			reg = <0 0x10007000 0 0x100>;
309 			reg = <0 0x1000b000 0 0x1000>;
320 			reg = <0 0x1000c000 0 0x1000>;
326 			reg = <0 0x1000d000 0 0x1000>;
338 			reg = <0 0x10010000 0 0x1000>;
348 			reg = <0 0x10200000 0 0x2000>;
357 			reg = <0 0x10200a80 0 0x20>;
362 			reg = <0 0x1020e000 0 0x1000>;
368 			reg = <0 0x1020f000 0 0x100>;
375 			reg = <0 0x11000280 0 0x80>,
376 			      <0 0x11000300 0 0x80>,
377 			      <0 0x11000380 0 0x80>,
378 			      <0 0x11000400 0 0x80>,
379 			      <0 0x11000580 0 0x80>,
380 			      <0 0x11000600 0 0x80>;
395 			reg = <0 0x11002000 0 0x1000>;
399 			dmas = <&apdma 0>, <&apdma 1>;
406 			reg = <0 0x11003000 0 0x1000>;
417 			reg = <0 0x11004000 0 0x1000>;
428 			reg = <0 0x11006000 0 0x1000>;
441 			reg = <0 0x11007000 0 0xa0>, <0 0x11000080 0 0x80>;
447 			#size-cells = <0>;
453 			reg = <0 0x11008000 0 0xa0>, <0 0x11000100 0 0x80>;
459 			#size-cells = <0>;
465 			reg = <0 0x11009000 0 0xa0>, <0 0x11000180 0 0x80>;
471 			#size-cells = <0>;
477 			reg = <0 0x1100a000 0 0x100>;
479 			#size-cells = <0>;
490 			reg = <0 0x1100f000 0 0xa0>, <0 0x11000200 0 0x80>;
496 			#size-cells = <0>;
502 			reg = <0 0x11201000 0 0x2e00>, <0 0x11203e00 0 0x0100>;
519 				reg = <0 0x11200000 0 0x1000>;
535 			reg = <0 0x11230000 0 0x1000>,
536 			      <0 0x11cd0000 0 0x1000>;
547 			reg = <0 0x11240000 0 0x1000>,
548 			      <0 0x11c90000 0 0x1000>;
559 			reg = <0 0x11250000 0 0x1000>,
560 			      <0 0x11c60000 0 0x1000>;
574 			reg = <0 0x112a0000 0 0x1000>;
588 			ranges = <0 0 0x11cc0000 0x9000>;
590 			u2port0: usb-phy@0 {
591 				reg = <0x0 0x400>;
599 				reg = <0x1000 0x400>;
620 		#clock-cells = <0>;
625 		reg = <0 0x10017000 0 0x100>;