Lines Matching +full:phy +full:- +full:handle

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
45 gpio-keys {
46 compatible = "gpio-keys";
48 key-reset {
52 debounce-interval = <60>;
56 exp_usb3_vbus: usb3-vbus {
57 compatible = "regulator-fixed";
58 regulator-name = "usb3-vbus";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
61 enable-active-high;
62 regulator-always-on;
66 vsdc_reg: vsdc-reg {
67 compatible = "regulator-gpio";
68 regulator-name = "vsdc";
69 regulator-min-microvolt = <1800000>;
70 regulator-max-microvolt = <3300000>;
71 regulator-boot-on;
74 gpios-states = <0>;
77 enable-active-high;
80 vsdio_reg: vsdio-reg {
81 compatible = "regulator-gpio";
82 regulator-name = "vsdio";
83 regulator-min-microvolt = <1800000>;
84 regulator-max-microvolt = <3300000>;
85 regulator-boot-on;
88 gpios-states = <0>;
91 enable-active-high;
94 sdhci1_pwrseq: sdhci1-pwrseq {
95 compatible = "mmc-pwrseq-simple";
96 reset-gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
102 i2c-bus = <&i2c0>;
103 los-gpios = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>;
104 tx-fault-gpios = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>;
105 mod-def0-gpios = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>;
106 tx-disable-gpios = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>;
107 rate-select0-gpios = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>;
108 maximum-power-milliwatt = <3000>;
110 /* enabled by U-Boot if SFP module is present */
115 armada-3700-rwtm {
116 compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";
122 pinctrl-names = "default";
123 pinctrl-0 = <&i2c1_pins>;
124 clock-frequency = <100000>;
125 /delete-property/ mrvl,i2c-fast-mode;
128 /* MCP7940MT-I/MNY RTC */
132 interrupt-parent = <&gpiosb>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
141 reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
142 slot-power-limit-milliwatt = <10000>;
144 * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
149 * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address
152 * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in
153 * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix):
154 * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7
155 * https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf
156 * https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33
158 * in U-Boot version 2022.04 by following commit:
159 * https://source.denx.de/u-boot/u-boot/-/commit/1fd54253bca7d43d046bba4853fe5fafd034bc17
161 #address-cells = <3>;
162 #size-cells = <2>;
166 /* enabled by U-Boot if PCIe module is present */
175 pinctrl-names = "default";
176 pinctrl-0 = <&rgmii_pins>;
177 phy-mode = "rgmii-id";
178 phy-handle = <&phy1>;
183 phy-mode = "2500base-x";
184 managed = "in-band-status";
189 wp-inverted;
190 bus-width = <4>;
191 cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
192 vqmmc-supply = <&vsdc_reg>;
193 marvell,pad-type = "sd";
198 pinctrl-names = "default";
199 pinctrl-0 = <&sdio_pins>;
200 non-removable;
201 bus-width = <4>;
202 marvell,pad-type = "sd";
203 vqmmc-supply = <&vsdio_reg>;
204 mmc-pwrseq = <&sdhci1_pwrseq>;
206 sdhci-caps-mask = <0x2 0x0>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&spi_quad_pins &spi_cs1_pins>;
214 assigned-clocks = <&nb_periph_clk 7>;
215 assigned-clock-parents = <&tbg 1>;
216 assigned-clock-rates = <20000000>;
219 #address-cells = <1>;
220 #size-cells = <1>;
221 compatible = "jedec,spi-nor";
223 spi-max-frequency = <20000000>;
226 compatible = "fixed-partitions";
227 #address-cells = <1>;
228 #size-cells = <1>;
231 label = "secure-firmware";
236 label = "a53-firmware";
241 label = "u-boot-env";
258 #address-cells = <1>;
259 #size-cells = <0>;
262 reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
263 spi-max-frequency = <10000000>;
264 spi-cpol;
265 spi-cpha;
266 interrupt-controller;
267 #interrupt-cells = <1>;
268 interrupt-parent = <&gpiosb>;
273 compatible = "cznic,moxtet-gpio";
274 gpio-controller;
275 #gpio-cells = <2>;
288 compatible = "usb-a-connector";
289 phy-supply = <&exp_usb3_vbus>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&smi_pins>;
303 phy1: ethernet-phy@1 {
307 /* switch nodes are enabled by U-Boot if modules are present */
312 interrupt-parent = <&moxtet>;
317 #address-cells = <1>;
318 #size-cells = <0>;
354 #address-cells = <1>;
355 #size-cells = <0>;
360 phy-handle = <&switch0phy1>;
366 phy-handle = <&switch0phy2>;
372 phy-handle = <&switch0phy3>;
378 phy-handle = <&switch0phy4>;
384 phy-handle = <&switch0phy5>;
390 phy-handle = <&switch0phy6>;
396 phy-handle = <&switch0phy7>;
402 phy-handle = <&switch0phy8>;
409 phy-mode = "2500base-x";
410 managed = "in-band-status";
416 phy-mode = "2500base-x";
417 managed = "in-band-status";
422 port-sfp@a {
426 phy-mode = "sgmii";
427 managed = "in-band-status";
437 interrupt-parent = <&moxtet>;
442 #address-cells = <1>;
443 #size-cells = <0>;
463 #address-cells = <1>;
464 #size-cells = <0>;
469 phy-handle = <&switch0phy1_topaz>;
475 phy-handle = <&switch0phy2_topaz>;
481 phy-handle = <&switch0phy3_topaz>;
487 phy-handle = <&switch0phy4_topaz>;
493 phy-mode = "2500base-x";
494 managed = "in-band-status";
504 interrupt-parent = <&moxtet>;
509 #address-cells = <1>;
510 #size-cells = <0>;
546 #address-cells = <1>;
547 #size-cells = <0>;
552 phy-handle = <&switch1phy1>;
558 phy-handle = <&switch1phy2>;
564 phy-handle = <&switch1phy3>;
570 phy-handle = <&switch1phy4>;
576 phy-handle = <&switch1phy5>;
582 phy-handle = <&switch1phy6>;
588 phy-handle = <&switch1phy7>;
594 phy-handle = <&switch1phy8>;
600 phy-mode = "2500base-x";
601 managed = "in-band-status";
608 phy-mode = "2500base-x";
609 managed = "in-band-status";
614 port-sfp@a {
618 phy-mode = "sgmii";
619 managed = "in-band-status";
629 interrupt-parent = <&moxtet>;
634 #address-cells = <1>;
635 #size-cells = <0>;
655 #address-cells = <1>;
656 #size-cells = <0>;
661 phy-handle = <&switch1phy1_topaz>;
667 phy-handle = <&switch1phy2_topaz>;
673 phy-handle = <&switch1phy3_topaz>;
679 phy-handle = <&switch1phy4_topaz>;
685 phy-mode = "2500base-x";
686 managed = "in-band-status";
696 interrupt-parent = <&moxtet>;
701 #address-cells = <1>;
702 #size-cells = <0>;
738 #address-cells = <1>;
739 #size-cells = <0>;
744 phy-handle = <&switch2phy1>;
750 phy-handle = <&switch2phy2>;
756 phy-handle = <&switch2phy3>;
762 phy-handle = <&switch2phy4>;
768 phy-handle = <&switch2phy5>;
774 phy-handle = <&switch2phy6>;
780 phy-handle = <&switch2phy7>;
786 phy-handle = <&switch2phy8>;
792 phy-mode = "2500base-x";
793 managed = "in-band-status";
797 port-sfp@a {
801 phy-mode = "sgmii";
802 managed = "in-band-status";
812 interrupt-parent = <&moxtet>;
817 #address-cells = <1>;
818 #size-cells = <0>;
838 #address-cells = <1>;
839 #size-cells = <0>;
844 phy-handle = <&switch2phy1_topaz>;
850 phy-handle = <&switch2phy2_topaz>;
856 phy-handle = <&switch2phy3_topaz>;
862 phy-handle = <&switch2phy4_topaz>;
868 phy-mode = "2500base-x";
869 managed = "in-band-status";