Lines Matching full:clkmgr
148 clkmgr: clock-controller@ffd10000 { label
149 compatible = "intel,agilex-clkmgr";
167 clocks = <&clkmgr AGILEX_EMAC0_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
185 clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
203 clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;
255 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
266 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
277 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
288 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
299 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
312 clocks = <&clkmgr AGILEX_L4_MP_CLK>,
313 <&clkmgr AGILEX_SDMMC_CLK>;
328 clocks = <&clkmgr AGILEX_NAND_CLK>,
329 <&clkmgr AGILEX_NAND_X_CLK>,
330 <&clkmgr AGILEX_NAND_ECC_CLK>;
359 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
428 clocks = <&clkmgr AGILEX_MPU_CCU_CLK>,
429 <&clkmgr AGILEX_L3_MAIN_FREE_CLK>,
430 <&clkmgr AGILEX_L4_MAIN_CLK>;
444 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
458 clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
471 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
479 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
487 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
495 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
507 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
517 clocks = <&clkmgr AGILEX_L4_SP_CLK>;
529 clocks = <&clkmgr AGILEX_USB_CLK>;
544 clocks = <&clkmgr AGILEX_USB_CLK>;
553 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
562 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
571 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;
580 clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>;