Lines Matching +full:aips +full:- +full:bus
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx93-pinfunc.h"
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
47 #address-cells = <1>;
48 #size-cells = <0>;
50 idle-states {
51 entry-method = "psci";
53 cpu_pd_wait: cpu-pd-wait {
54 compatible = "arm,idle-state";
55 arm,psci-suspend-param = <0x0010033>;
56 local-timer-stop;
57 entry-latency-us = <10000>;
58 exit-latency-us = <7000>;
59 min-residency-us = <27000>;
60 wakeup-latency-us = <15000>;
66 compatible = "arm,cortex-a55";
68 enable-method = "psci";
69 #cooling-cells = <2>;
70 cpu-idle-states = <&cpu_pd_wait>;
75 compatible = "arm,cortex-a55";
77 enable-method = "psci";
78 #cooling-cells = <2>;
79 cpu-idle-states = <&cpu_pd_wait>;
84 osc_32k: clock-osc-32k {
85 compatible = "fixed-clock";
86 #clock-cells = <0>;
87 clock-frequency = <32768>;
88 clock-output-names = "osc_32k";
91 osc_24m: clock-osc-24m {
92 compatible = "fixed-clock";
93 #clock-cells = <0>;
94 clock-frequency = <24000000>;
95 clock-output-names = "osc_24m";
98 clk_ext1: clock-ext1 {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <133000000>;
102 clock-output-names = "clk_ext1";
106 compatible = "arm,cortex-a55-pmu";
111 compatible = "arm,psci-1.0";
116 compatible = "arm,armv8-timer";
121 clock-frequency = <24000000>;
122 arm,no-tick-in-suspend;
123 interrupt-parent = <&gic>;
126 gic: interrupt-controller@48000000 {
127 compatible = "arm,gic-v3";
130 #interrupt-cells = <3>;
131 interrupt-controller;
133 interrupt-parent = <&gic>;
136 thermal-zones {
137 cpu-thermal {
138 polling-delay-passive = <250>;
139 polling-delay = <2000>;
141 thermal-sensors = <&tmu 0>;
144 cpu_alert: cpu-alert {
150 cpu_crit: cpu-crit {
157 cooling-maps {
160 cooling-device =
168 cm33: remoteproc-cm33 {
169 compatible = "fsl,imx93-cm33";
175 compatible = "simple-bus";
176 #address-cells = <1>;
177 #size-cells = <1>;
181 aips1: bus@44000000 {
182 compatible = "fsl,aips-bus", "simple-bus";
184 #address-cells = <1>;
185 #size-cells = <1>;
189 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
194 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
198 #mbox-cells = <2>;
203 compatible = "nxp,sysctr-timer";
207 clock-names = "per";
208 nxp,no-divider;
212 compatible = "fsl,imx93-wdt";
216 timeout-sec = <40>;
221 compatible = "fsl,imx93-wdt";
225 timeout-sec = <40>;
230 compatible = "fsl,imx7ulp-pwm";
233 #pwm-cells = <3>;
238 compatible = "fsl,imx7ulp-pwm";
241 #pwm-cells = <3>;
246 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
248 #address-cells = <1>;
249 #size-cells = <0>;
253 clock-names = "per", "ipg";
258 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
260 #address-cells = <1>;
261 #size-cells = <0>;
265 clock-names = "per", "ipg";
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
277 clock-names = "per", "ipg";
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
289 clock-names = "per", "ipg";
294 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
298 clock-names = "ipg";
303 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
307 clock-names = "ipg";
312 compatible = "fsl,imx93-flexcan";
317 clock-names = "ipg", "per";
318 assigned-clocks = <&clk IMX93_CLK_CAN1>;
319 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
320 assigned-clock-rates = <40000000>;
321 fsl,clk-source = /bits/ 8 <0>;
322 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
327 compatible = "fsl,imx93-iomuxc";
333 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
337 compatible = "nxp,imx93-bbnsm-rtc";
342 compatible = "nxp,imx93-bbnsm-pwrkey";
348 clk: clock-controller@44450000 {
349 compatible = "fsl,imx93-ccm";
351 #clock-cells = <1>;
353 clock-names = "osc_32k", "osc_24m", "clk_ext1";
357 src: system-controller@44460000 {
358 compatible = "fsl,imx93-src", "syscon";
360 #address-cells = <1>;
361 #size-cells = <1>;
364 mlmix: power-domain@44461800 {
365 compatible = "fsl,imx93-src-slice";
367 #power-domain-cells = <0>;
372 mediamix: power-domain@44462400 {
373 compatible = "fsl,imx93-src-slice";
375 #power-domain-cells = <0>;
382 compatible = "fsl,imx93-anatop", "syscon";
387 compatible = "fsl,qoriq-tmu";
390 little-endian;
391 fsl,tmu-range = <0x800000da 0x800000e9
395 fsl,tmu-calibration = <0x00000000 0x0000000e
402 #thermal-sensor-cells = <1>;
407 compatible = "nxp,imx93-adc";
414 clock-names = "ipg";
415 #io-channel-cells = <1>;
420 aips2: bus@42000000 {
421 compatible = "fsl,aips-bus", "simple-bus";
423 #address-cells = <1>;
424 #size-cells = <1>;
428 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
433 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
437 #mbox-cells = <2>;
442 compatible = "fsl,imx93-wdt";
446 timeout-sec = <40>;
451 compatible = "fsl,imx93-wdt";
455 timeout-sec = <40>;
460 compatible = "fsl,imx93-wdt";
464 timeout-sec = <40>;
469 compatible = "fsl,imx7ulp-pwm";
472 #pwm-cells = <3>;
477 compatible = "fsl,imx7ulp-pwm";
480 #pwm-cells = <3>;
485 compatible = "fsl,imx7ulp-pwm";
488 #pwm-cells = <3>;
493 compatible = "fsl,imx7ulp-pwm";
496 #pwm-cells = <3>;
501 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
503 #address-cells = <1>;
504 #size-cells = <0>;
508 clock-names = "per", "ipg";
513 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
515 #address-cells = <1>;
516 #size-cells = <0>;
520 clock-names = "per", "ipg";
525 #address-cells = <1>;
526 #size-cells = <0>;
527 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
532 clock-names = "per", "ipg";
537 #address-cells = <1>;
538 #size-cells = <0>;
539 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
544 clock-names = "per", "ipg";
549 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
553 clock-names = "ipg";
558 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
562 clock-names = "ipg";
567 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
571 clock-names = "ipg";
576 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
580 clock-names = "ipg";
585 compatible = "fsl,imx93-flexcan";
590 clock-names = "ipg", "per";
591 assigned-clocks = <&clk IMX93_CLK_CAN2>;
592 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
593 assigned-clock-rates = <40000000>;
594 fsl,clk-source = /bits/ 8 <0>;
595 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
600 compatible = "nxp,imx8mm-fspi";
602 reg-names = "fspi_base", "fspi_mmap";
603 #address-cells = <1>;
604 #size-cells = <0>;
608 clock-names = "fspi_en", "fspi";
609 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
610 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
615 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
619 clock-names = "ipg";
624 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
628 clock-names = "ipg";
633 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
635 #address-cells = <1>;
636 #size-cells = <0>;
640 clock-names = "per", "ipg";
645 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
647 #address-cells = <1>;
648 #size-cells = <0>;
652 clock-names = "per", "ipg";
657 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
659 #address-cells = <1>;
660 #size-cells = <0>;
664 clock-names = "per", "ipg";
669 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
671 #address-cells = <1>;
672 #size-cells = <0>;
676 clock-names = "per", "ipg";
681 #address-cells = <1>;
682 #size-cells = <0>;
683 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
688 clock-names = "per", "ipg";
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
700 clock-names = "per", "ipg";
705 #address-cells = <1>;
706 #size-cells = <0>;
707 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
712 clock-names = "per", "ipg";
717 #address-cells = <1>;
718 #size-cells = <0>;
719 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
724 clock-names = "per", "ipg";
730 aips3: bus@42800000 {
731 compatible = "fsl,aips-bus", "simple-bus";
733 #address-cells = <1>;
734 #size-cells = <1>;
738 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
744 clock-names = "ipg", "ahb", "per";
745 bus-width = <8>;
746 fsl,tuning-start-tap = <20>;
747 fsl,tuning-step = <2>;
752 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
758 clock-names = "ipg", "ahb", "per";
759 bus-width = <4>;
760 fsl,tuning-start-tap = <20>;
761 fsl,tuning-step = <2>;
766 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
777 clock-names = "ipg", "ahb", "ptp",
779 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
782 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
785 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
786 fsl,num-tx-queues = <3>;
787 fsl,num-rx-queues = <3>;
788 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
789 nvmem-cells = <ð_mac1>;
790 nvmem-cell-names = "mac-address";
795 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
799 interrupt-names = "macirq", "eth_wake_irq";
805 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
806 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
808 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
810 assigned-clock-rates = <100000000>, <250000000>;
812 snps,clk-csr = <6>;
813 nvmem-cells = <ð_mac2>;
814 nvmem-cell-names = "mac-address";
819 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
825 clock-names = "ipg", "ahb", "per";
826 bus-width = <4>;
827 fsl,tuning-start-tap = <20>;
828 fsl,tuning-step = <2>;
834 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
836 gpio-controller;
837 #gpio-cells = <2>;
839 interrupt-controller;
840 #interrupt-cells = <2>;
843 clock-names = "gpio", "port";
844 gpio-ranges = <&iomuxc 0 4 30>;
848 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
850 gpio-controller;
851 #gpio-cells = <2>;
853 interrupt-controller;
854 #interrupt-cells = <2>;
857 clock-names = "gpio", "port";
858 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
863 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
865 gpio-controller;
866 #gpio-cells = <2>;
868 interrupt-controller;
869 #interrupt-cells = <2>;
872 clock-names = "gpio", "port";
873 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
877 compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
879 gpio-controller;
880 #gpio-cells = <2>;
882 interrupt-controller;
883 #interrupt-cells = <2>;
886 clock-names = "gpio", "port";
887 gpio-ranges = <&iomuxc 0 92 16>;
891 compatible = "fsl,imx93-ocotp", "syscon";
893 #address-cells = <1>;
894 #size-cells = <1>;
896 eth_mac1: mac-address@4ec {
900 eth_mac2: mac-address@4f2 {
907 compatible = "fsl,imx93-mu-s4";
911 interrupt-names = "tx", "rx";
912 #mbox-cells = <2>;
915 media_blk_ctrl: system-controller@4ac10000 {
916 compatible = "fsl,imx93-media-blk-ctrl", "syscon";
918 power-domains = <&mediamix>;
929 clock-names = "apb", "axi", "nic", "disp", "cam",
931 #power-domain-cells = <1>;
935 ddr-pmu@4e300dc0 {
936 compatible = "fsl,imx93-ddr-pmu";