Lines Matching +full:clk +full:- +full:gpios
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2019-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mq-tqma8mq.dtsi"
12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq";
23 extcon_usbotg: extcon-usbotg0 {
24 compatible = "linux,extcon-usb-gpio";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_usbcon0>;
27 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
30 pcie0_refclk: pcie0-refclk {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <100000000>;
36 pcie1_refclk: pcie1-refclk {
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <100000000>;
42 reg_otg_vbus: regulator-otg-vbus {
43 compatible = "regulator-fixed";
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_regotgvbus>;
46 regulator-name = "MBA8MQ_OTG_VBUS";
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
50 enable-active-high;
53 reg_usdhc2_vmmc: regulator-vmmc {
54 compatible = "regulator-fixed";
55 regulator-name = "VSD_3V3";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
59 enable-active-high;
64 gpios = <&gpio3 17 GPIO_ACTIVE_LOW>;
70 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
78 gpio-controller;
79 #gpio-cells = <2>;
80 vcc-supply = <®_vcc_3v3>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_expander>;
83 interrupt-parent = <&gpio1>;
85 interrupt-controller;
86 #interrupt-cells = <2>;
88 mpcie-rst-hog {
89 gpio-hog;
90 gpios = <13 0>;
91 output-high;
92 line-name = "MPCIE_RST#";
102 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
106 reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
107 clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
109 <&clk IMX8MQ_CLK_PCIE1_PHY>,
110 <&clk IMX8MQ_CLK_PCIE1_AUX>;
119 clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
121 <&clk IMX8MQ_CLK_PCIE2_PHY>,
122 <&clk IMX8MQ_CLK_PCIE2_AUX>;
127 assigned-clocks = <&clk IMX8MQ_CLK_SAI3>;
128 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
129 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
130 clocks = <&clk IMX8MQ_CLK_SAI3_IPG>, <&clk IMX8MQ_CLK_DUMMY>,
131 <&clk IMX8MQ_CLK_SAI3_ROOT>, <&clk IMX8MQ_CLK_DUMMY>,
132 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_AUDIO_PLL1_OUT>,
133 <&clk IMX8MQ_AUDIO_PLL2_OUT>;
137 clock-names = "mclk";
138 clocks = <&clk IMX8MQ_CLK_SAI3_ROOT>;
142 assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
143 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
147 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
148 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
153 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
154 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
158 vbus-supply = <®_otg_vbus>;
165 hnp-disable;
166 srp-disable;
167 adp-disable;
182 pinctrl-names = "default";
183 pinctrl-0 = <&pinctrl_wdog>;
184 fsl,ext-reset-output;
304 /* ID: floating / high: device, low: host -> use PU */
318 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
328 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
338 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {