Lines Matching +full:clk +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
17 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
20 stdout-path = &uart4;
23 iio-hwmon {
24 compatible = "iio-hwmon";
25 io-channels = <&adc 0>, <&adc 1>;
41 compatible = "pwm-backlight";
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_backlight>;
45 brightness-levels = <0 4 8 16 32 64 128 255>;
46 default-brightness-level = <7>;
47 power-supply = <®_vcc_12v0>;
48 enable-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
52 clk_xtal25: clk-xtal25 {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <25000000>;
58 fan0: pwm-fan {
59 compatible = "pwm-fan";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_pwmfan>;
62 fan-supply = <®_pwm_fan>;
63 #cooling-cells = <2>;
64 /* typical 25 kHz -> 40.000 nsec */
66 cooling-levels = <0 32 64 128 196 240>;
67 pulses-per-revolution = <2>;
68 interrupt-parent = <&gpio5>;
73 gpio-keys {
74 compatible = "gpio-keys";
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_gpiobutton>;
79 switch-1 {
82 gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
83 wakeup-source;
86 switch-2 {
89 gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
90 wakeup-source;
94 gpio-leds {
95 compatible = "gpio-leds";
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_gpioled>;
99 led-0 {
102 function-enumerator = <0>;
103 gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
104 linux,default-trigger = "default-on";
107 led-1 {
110 gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
111 linux,default-trigger = "heartbeat";
114 led-2 {
117 function-enumerator = <1>;
118 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_lvdsdisplay>;
129 power-supply = <®_vcc_3v3>;
130 enable-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
135 reg_pwm_fan: regulator-pwm-fan {
136 compatible = "regulator-fixed";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_regpwmfan>;
139 regulator-name = "FAN_PWR";
140 regulator-min-microvolt = <12000000>;
141 regulator-max-microvolt = <12000000>;
143 enable-active-high;
144 vin-supply = <®_vcc_12v0>;
147 reg_usdhc2_vmmc: regulator-usdhc2 {
148 compatible = "regulator-fixed";
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
151 regulator-name = "VSD_3V3";
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
155 enable-active-high;
156 startup-delay-us = <100>;
157 off-on-delay-us = <12000>;
160 reg_vcc_12v0: regulator-12v0 {
161 compatible = "regulator-fixed";
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_reg12v0>;
164 regulator-name = "VCC_12V0";
165 regulator-min-microvolt = <12000000>;
166 regulator-max-microvolt = <12000000>;
168 enable-active-high;
171 reg_vcc_1v8: regulator-1v8 {
172 compatible = "regulator-fixed";
173 regulator-name = "VCC_1V8";
174 regulator-min-microvolt = <1800000>;
175 regulator-max-microvolt = <1800000>;
178 reg_vcc_3v3: regulator-3v3 {
179 compatible = "regulator-fixed";
180 regulator-name = "VCC_3V3";
181 regulator-min-microvolt = <3300000>;
182 regulator-max-microvolt = <3300000>;
185 reg_vcc_5v0: regulator-5v0 {
186 compatible = "regulator-fixed";
187 regulator-name = "VCC_5V0";
188 regulator-min-microvolt = <5000000>;
189 regulator-max-microvolt = <5000000>;
192 reserved-memory {
193 #address-cells = <2>;
194 #size-cells = <2>;
198 no-map;
204 compatible = "shared-dma-pool";
207 alloc-ranges = <0 0x40000000 0 0xB0000000>;
208 linux,cma-default;
213 compatible = "fsl,imx-audio-tlv320aic32x4";
214 model = "tq-tlv320aic32x";
215 audio-cpu = <&sai3>;
216 audio-codec = <&tlv320aic3x04>;
219 thermal-zones {
220 soc-thermal {
222 soc_active0: trip-active0 {
228 soc_active1: trip-active1 {
234 soc_active2: trip-active2 {
241 cooling-maps {
244 cooling-device = <&fan0 1 1>;
249 cooling-device = <&fan0 2 2>;
254 cooling-device = <&fan0 3 3>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_ecspi1>;
264 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_ecspi2>;
271 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_ecspi3>;
278 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
285 spi-max-frequency = <1800000>;
286 vref-supply = <®_vcc_3v3>;
287 #io-channel-cells = <1>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_eqos_phy>;
294 phy-mode = "rgmii-id";
295 phy-handle = <ðphy3>;
299 compatible = "snps,dwmac-mdio";
300 #address-cells = <1>;
301 #size-cells = <0>;
303 ethphy3: ethernet-phy@3 {
304 compatible = "ethernet-phy-ieee802.3-c22";
306 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
307 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
308 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
309 ti,dp83867-rxctrl-strap-quirk;
310 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
311 reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
312 reset-assert-us = <500000>;
313 reset-deassert-us = <50000>;
314 enet-phy-lane-no-swap;
315 interrupt-parent = <&gpio4>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_fec>, <&pinctrl_fec_phy>;
324 phy-mode = "rgmii-id";
325 phy-handle = <ðphy0>;
326 fsl,magic-packet;
330 #address-cells = <1>;
331 #size-cells = <0>;
333 ethphy0: ethernet-phy@0 {
334 compatible = "ethernet-phy-ieee802.3-c22";
336 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
337 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
338 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
339 ti,dp83867-rxctrl-strap-quirk;
340 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
341 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
342 reset-assert-us = <500000>;
343 reset-deassert-us = <50000>;
344 enet-phy-lane-no-swap;
345 interrupt-parent = <&gpio4>;
352 pinctrl-names = "default";
353 pinctrl-0 = <&pinctrl_flexcan1>;
354 xceiver-supply = <®_vcc_3v3>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_flexcan2>;
361 xceiver-supply = <®_vcc_3v3>;
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_gpio1>;
369 gpio-line-names = "GPO1", "GPO0", "", "GPO3",
380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_hoggpio2>;
383 gpio-line-names = "", "", "", "",
392 perst-hog {
393 gpio-hog;
394 gpios = <7 0>;
395 output-high;
396 line-name = "PERST#";
399 clkreq-hog {
400 gpio-hog;
401 gpios = <10 0>;
403 line-name = "CLKREQ#";
406 pewake-hog {
407 gpio-hog;
408 gpios = <11 0>;
410 line-name = "PEWAKE#";
415 gpio-line-names = "", "", "", "",
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_gpio4>;
429 gpio-line-names = "ENET0_RST#", "ENET0_INT#", "ENET1_RST#", "ENET1_INT#",
438 pcie-refclkreq-hog {
439 gpio-hog;
440 gpios = <22 0>;
441 output-high;
442 line-name = "PCIE_REFCLK_OE#";
447 gpio-line-names = "", "", "", "LED2",
458 clock-frequency = <384000>;
459 pinctrl-names = "default", "gpio";
460 pinctrl-0 = <&pinctrl_i2c2>;
461 pinctrl-1 = <&pinctrl_i2c2_gpio>;
462 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
463 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
466 tlv320aic3x04: audio-codec@18 {
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_tlv320aic3x04>;
471 clock-names = "mclk";
473 reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
474 iov-supply = <®_vcc_1v8>;
475 ldoin-supply = <®_vcc_3v3>;
478 se97_1c: temperature-sensor@1c {
479 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
487 vcc-supply = <®_vcc_3v3>;
490 pcieclk: clock-generator@6a {
494 #clock-cells = <1>;
499 clock-frequency = <384000>;
500 pinctrl-names = "default", "gpio";
501 pinctrl-0 = <&pinctrl_i2c4>;
502 pinctrl-1 = <&pinctrl_i2c4_gpio>;
503 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
504 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
509 clock-frequency = <384000>;
510 pinctrl-names = "default", "gpio";
511 pinctrl-0 = <&pinctrl_i2c6>;
512 pinctrl-1 = <&pinctrl_i2c6_gpio>;
513 scl-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
514 sda-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_pcf85063>;
522 interrupt-parent = <&gpio4>;
527 fsl,clkreq-unsupported;
528 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
530 clock-names = "ref";
535 clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
536 <&clk IMX8MP_CLK_HSIO_AXI>,
537 <&clk IMX8MP_CLK_PCIE_ROOT>;
538 clock-names = "pcie", "pcie_bus", "pcie_aux";
539 assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
540 assigned-clock-rates = <10000000>;
541 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_pwm2>;
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_pwm3>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_sai3>;
560 assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
561 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
562 assigned-clock-rates = <12288000>;
563 fsl,sai-mclk-direction-output;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_uart1>;
574 assigned-clocks = <&clk IMX8MP_CLK_UART1>;
575 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_uart2>;
582 assigned-clocks = <&clk IMX8MP_CLK_UART2>;
583 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_uart3>;
590 assigned-clocks = <&clk IMX8MP_CLK_UART3>;
591 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_uart4>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&pinctrl_usb0>;
605 fsl,over-current-active-low;
610 fsl,disable-port-power-control;
611 fsl,permanently-attached;
617 vbus-supply = <®_vcc_5v0>;
622 vbus-supply = <®_vcc_5v0>;
628 hnp-disable;
629 srp-disable;
630 adp-disable;
632 usb-role-switch;
633 role-switch-default-mode = "peripheral";
637 compatible = "gpio-usb-b-connector", "usb-b-connector";
640 pinctrl-names = "default";
641 pinctrl-0 = <&pinctrl_usbcon0>;
642 id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
648 #address-cells = <1>;
649 #size-cells = <0>;
650 pinctrl-names = "default";
651 pinctrl-0 = <&pinctrl_usbhub>;
657 peer-hub = <&hub_3_0>;
658 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
659 vdd-supply = <®_vcc_3v3>;
665 peer-hub = <&hub_2_0>;
666 reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
667 vdd-supply = <®_vcc_3v3>;
672 pinctrl-names = "default", "state_100mhz", "state_200mhz";
673 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
674 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
675 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
676 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
677 vmmc-supply = <®_usdhc2_vmmc>;
678 no-mmc;
679 no-sdio;
680 disable-wp;
681 bus-width = <4>;
827 pinctrl_i2c2_gpio: i2c2-gpiogrp {
837 pinctrl_i2c4_gpio: i2c4-gpiogrp {
847 pinctrl_i2c6_gpio: i2c6-gpiogrp {
944 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
954 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
964 pinctrl_usdhc2_gpio: usdhc2-gpiogrp {