Lines Matching +full:quartz +full:- +full:load +full:- +full:femtofarads
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <1800000>;
28 reg_vcc3v3: regulator-vcc3v3 {
29 compatible = "regulator-fixed";
30 regulator-name = "TQMA8MXML_VCC3V3";
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
35 reserved-memory {
36 #address-cells = <2>;
37 #size-cells = <2>;
42 compatible = "shared-dma-pool";
46 /* 1024 - 128 MiB, our minimum RAM config will be 1024 MiB */
47 alloc-ranges = <0 0x40000000 0 0x78000000>;
48 linux,cma-default;
54 cpu-supply = <&buck2_reg>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexspi>;
63 compatible = "jedec,spi-nor";
65 #address-cells = <1>;
66 #size-cells = <1>;
67 spi-max-frequency = <84000000>;
68 spi-tx-bus-width = <1>;
69 spi-rx-bus-width = <4>;
82 clock-frequency = <100000>;
83 pinctrl-names = "default", "gpio";
84 pinctrl-0 = <&pinctrl_i2c1>;
85 pinctrl-1 = <&pinctrl_i2c1_gpio>;
86 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
87 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
90 sensor0: temperature-sensor@1b {
91 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
100 pinctrl-0 = <&pinctrl_pmic>;
101 pinctrl-names = "default";
102 interrupt-parent = <&gpio1>;
108 regulator-name = "BUCK1";
109 regulator-min-microvolt = <850000>;
110 regulator-max-microvolt = <850000>;
111 regulator-boot-on;
112 regulator-always-on;
113 regulator-ramp-delay = <3125>;
118 regulator-name = "BUCK2";
119 regulator-min-microvolt = <850000>;
120 regulator-max-microvolt = <1000000>;
121 regulator-boot-on;
122 regulator-always-on;
123 nxp,dvs-run-voltage = <950000>;
124 nxp,dvs-standby-voltage = <850000>;
125 regulator-ramp-delay = <3125>;
130 regulator-name = "BUCK3";
131 regulator-min-microvolt = <850000>;
132 regulator-max-microvolt = <950000>;
133 regulator-boot-on;
134 regulator-always-on;
135 regulator-ramp-delay = <3125>;
138 /* VCC3V3 -> VMMC, ... must not be changed */
140 regulator-name = "BUCK4";
141 regulator-min-microvolt = <3300000>;
142 regulator-max-microvolt = <3300000>;
143 regulator-boot-on;
144 regulator-always-on;
147 /* V_1V8 -> VQMMC, SPI-NOR, ... must not be changed */
149 regulator-name = "BUCK5";
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <1800000>;
152 regulator-boot-on;
153 regulator-always-on;
156 /* V_1V1 -> RAM, ... must not be changed */
158 regulator-name = "BUCK6";
159 regulator-min-microvolt = <1100000>;
160 regulator-max-microvolt = <1100000>;
161 regulator-boot-on;
162 regulator-always-on;
167 regulator-name = "LDO1";
168 regulator-min-microvolt = <1800000>;
169 regulator-max-microvolt = <1800000>;
170 regulator-boot-on;
171 regulator-always-on;
176 regulator-name = "LDO2";
177 regulator-min-microvolt = <800000>;
178 regulator-max-microvolt = <850000>;
179 regulator-boot-on;
180 regulator-always-on;
185 regulator-name = "LDO3";
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
188 regulator-boot-on;
189 regulator-always-on;
194 regulator-name = "LDO4";
195 regulator-min-microvolt = <900000>;
196 regulator-max-microvolt = <900000>;
197 regulator-boot-on;
198 regulator-always-on;
201 /* VCC SD IO - switched using SD2 VSELECT */
203 regulator-name = "LDO5";
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <3300000>;
214 quartz-load-femtofarads = <7000>;
219 read-only;
222 vcc-supply = <®_vcc3v3>;
229 vcc-supply = <®_vcc3v3>;
234 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
235 fsl,clkreq-unsupported;
239 pinctrl-names = "default", "state_100mhz", "state_200mhz";
240 pinctrl-0 = <&pinctrl_usdhc3>;
241 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
242 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
243 bus-width = <8>;
244 non-removable;
245 no-sd;
246 no-sdio;
247 vmmc-supply = <®_vcc3v3>;
248 vqmmc-supply = <®_vcc1v8>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_wdog>;
260 fsl,ext-reset-output;
308 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
324 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {