Lines Matching +full:0 +full:x84

16 		reg = <0x00000000 0x40000000 0 0x40000000>;
45 			size = <0 0x28000000>;
47 			alloc-ranges = <0 0x40000000 0 0x78000000>;
59 	pinctrl-0 = <&pinctrl_flexspi>;
62 	flash0: flash@0 {
64 		reg = <0>;
84 	pinctrl-0 = <&pinctrl_i2c1>;
92 		reg = <0x1b>;
97 		reg = <0x25>;
100 		pinctrl-0 = <&pinctrl_pmic>;
213 		reg = <0x51>;
220 		reg = <0x53>;
227 		reg = <0x57>;
240 	pinctrl-0 = <&pinctrl_usdhc3>;
259 	pinctrl-0 = <&pinctrl_wdog>;
266 		fsl,pins = <MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK		0x82>,
267 			   <MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B	0x82>,
268 			   <MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0	0x82>,
269 			   <MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1	0x82>,
270 			   <MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2	0x82>,
271 			   <MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3	0x82>;
275 		fsl,pins = <MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL		0x40000004>,
276 			   <MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA		0x40000004>;
280 		fsl,pins = <MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14		0x40000004>,
281 			   <MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15		0x40000004>;
285 		fsl,pins = <MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8		0x94>;
289 		fsl,pins = <MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19		0x84>;
293 		fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x1d4>,
294 			   <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d2>,
295 			   <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0	0x1d4>,
296 			   <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1	0x1d4>,
297 			   <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2	0x1d4>,
298 			   <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3	0x1d4>,
299 			   <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d4>,
300 			   <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5	0x1d4>,
301 			   <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6	0x1d4>,
302 			   <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d4>,
303 			   <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE	0x84>,
305 			   <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16	0x84>;
309 		fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x1d2>,
310 			   <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d2>,
311 			   <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0	0x1d4>,
312 			   <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1	0x1d4>,
313 			   <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2	0x1d4>,
314 			   <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3	0x1d4>,
315 			   <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d4>,
316 			   <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5	0x1d4>,
317 			   <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6	0x1d4>,
318 			   <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d4>,
319 			   <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE	0x84>,
321 			   <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16	0x84>;
325 		fsl,pins = <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x1d6>,
326 			   <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d2>,
327 			   <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0	0x1d4>,
328 			   <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1	0x1d4>,
329 			   <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2	0x1d4>,
330 			   <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3	0x1d4>,
331 			   <MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d4>,
332 			   <MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5	0x1d4>,
333 			   <MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6	0x1d4>,
334 			   <MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d4>,
335 			   <MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE	0x84>,
337 			   <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16	0x84>;
341 		fsl,pins = <MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x84>;