Lines Matching +full:imx8 +full:- +full:lpcg
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 audio_ipg_clk: clock-audio-ipg {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <120000000>;
20 clock-output-names = "audio_ipg_clk";
23 dsp_lpcg: clock-controller@59580000 {
24 compatible = "fsl,imx8qxp-lpcg";
26 #clock-cells = <1>;
30 clock-indices = <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>,
32 clock-output-names = "dsp_lpcg_adb_clk",
35 power-domains = <&pd IMX_SC_R_DSP>;
38 dsp_ram_lpcg: clock-controller@59590000 {
39 compatible = "fsl,imx8qxp-lpcg";
41 #clock-cells = <1>;
43 clock-indices = <IMX_LPCG_CLK_4>;
44 clock-output-names = "dsp_ram_lpcg_ipg_clk";
45 power-domains = <&pd IMX_SC_R_DSP_RAM>;
49 compatible = "fsl,imx8qxp-dsp";
54 clock-names = "ipg", "ocram", "core";
55 power-domains = <&pd IMX_SC_R_MU_13A>,
59 mbox-names = "txdb0", "txdb1",
65 memory-region = <&dsp_reserved>;