Lines Matching +full:0 +full:x6020000
12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
55 i-cache-size = <0xC000>;
67 reg = <0x100>;
69 d-cache-size = <0x8000>;
72 i-cache-size = <0xC000>;
84 reg = <0x101>;
86 d-cache-size = <0x8000>;
89 i-cache-size = <0xC000>;
101 reg = <0x200>;
103 d-cache-size = <0x8000>;
106 i-cache-size = <0xC000>;
118 reg = <0x201>;
120 d-cache-size = <0x8000>;
123 i-cache-size = <0xC000>;
135 reg = <0x300>;
137 d-cache-size = <0x8000>;
140 i-cache-size = <0xC000>;
152 reg = <0x301>;
154 d-cache-size = <0x8000>;
157 i-cache-size = <0xC000>;
169 reg = <0x400>;
171 d-cache-size = <0x8000>;
174 i-cache-size = <0xC000>;
186 reg = <0x401>;
188 d-cache-size = <0x8000>;
191 i-cache-size = <0xC000>;
203 reg = <0x500>;
205 d-cache-size = <0x8000>;
208 i-cache-size = <0xC000>;
220 reg = <0x501>;
222 d-cache-size = <0x8000>;
225 i-cache-size = <0xC000>;
237 reg = <0x600>;
239 d-cache-size = <0x8000>;
242 i-cache-size = <0xC000>;
254 reg = <0x601>;
256 d-cache-size = <0x8000>;
259 i-cache-size = <0xC000>;
271 reg = <0x700>;
273 d-cache-size = <0x8000>;
276 i-cache-size = <0xC000>;
288 reg = <0x701>;
290 d-cache-size = <0x8000>;
293 i-cache-size = <0xC000>;
304 cache-size = <0x100000>;
313 cache-size = <0x100000>;
322 cache-size = <0x100000>;
331 cache-size = <0x100000>;
340 cache-size = <0x100000>;
349 cache-size = <0x100000>;
358 cache-size = <0x100000>;
367 cache-size = <0x100000>;
376 arm,psci-suspend-param = <0x0>;
385 reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
386 <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
388 <0x0 0x0c0c0000 0 0x2000>, // GICC
389 <0x0 0x0c0d0000 0 0x1000>, // GICH
390 <0x0 0x0c0e0000 0 0x20000>; // GICV
401 reg = <0x0 0x6020000 0 0x20000>;
426 reg = <0x00000000 0x80000000 0 0x80000000>;
431 reg = <0x0 0x1080000 0x0 0x1000>;
438 reg = <0x0 0x1090000 0x0 0x1000>;
446 #clock-cells = <0>;
455 thermal-sensors = <&tmu 0>;
621 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
625 reg = <0x0 0x1ea0000 0x0 0x1e30>;
630 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
634 ranges = <0x0 0x00 0x8000000 0x100000>;
635 reg = <0x00 0x8000000 0x0 0x100000>;
641 compatible = "fsl,sec-v5.0-job-ring",
642 "fsl,sec-v4.0-job-ring";
643 reg = <0x10000 0x10000>;
648 compatible = "fsl,sec-v5.0-job-ring",
649 "fsl,sec-v4.0-job-ring";
650 reg = <0x20000 0x10000>;
655 compatible = "fsl,sec-v5.0-job-ring",
656 "fsl,sec-v4.0-job-ring";
657 reg = <0x30000 0x10000>;
662 compatible = "fsl,sec-v5.0-job-ring",
663 "fsl,sec-v4.0-job-ring";
664 reg = <0x40000 0x10000>;
671 reg = <0 0x1300000 0 0xa0000>;
678 reg = <0x0 0x1e00000 0x0 0x10000>;
684 reg = <0x0 0x1e80000 0x0 0x10000>;
692 reg = <0x0 0x1f70000 0x0 0x10000>;
696 ranges = <0x0 0x0 0x1f70000 0x10000>;
701 #address-cells = <0>;
703 reg = <0x14 4>;
705 <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
706 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
707 <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
708 <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
709 <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
710 <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
711 <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
712 <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
713 <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
714 <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
715 <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
716 <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
717 interrupt-map-mask = <0xf 0x0>;
723 reg = <0x0 0x1f80000 0x0 0x10000>;
725 fsl,tmu-range = <0x800000e6 0x8001017d>;
728 <0x00000000 0x00000035
730 0x00000001 0x00000154>;
738 #size-cells = <0>;
739 reg = <0x0 0x2000000 0x0 0x10000>;
751 #size-cells = <0>;
752 reg = <0x0 0x2010000 0x0 0x10000>;
763 #size-cells = <0>;
764 reg = <0x0 0x2020000 0x0 0x10000>;
775 #size-cells = <0>;
776 reg = <0x0 0x2030000 0x0 0x10000>;
787 #size-cells = <0>;
788 reg = <0x0 0x2040000 0x0 0x10000>;
800 #size-cells = <0>;
801 reg = <0x0 0x2050000 0x0 0x10000>;
812 #size-cells = <0>;
813 reg = <0x0 0x2060000 0x0 0x10000>;
824 #size-cells = <0>;
825 reg = <0x0 0x2070000 0x0 0x10000>;
836 #size-cells = <0>;
837 reg = <0x0 0x20c0000 0x0 0x10000>,
838 <0x0 0x20000000 0x0 0x10000000>;
852 #size-cells = <0>;
853 reg = <0x0 0x2100000 0x0 0x10000>;
859 bus-num = <0>;
866 #size-cells = <0>;
867 reg = <0x0 0x2110000 0x0 0x10000>;
880 #size-cells = <0>;
881 reg = <0x0 0x2120000 0x0 0x10000>;
893 reg = <0x0 0x2140000 0x0 0x10000>;
894 interrupts = <0 28 0x4>; /* Level high type */
907 reg = <0x0 0x2150000 0x0 0x10000>;
908 interrupts = <0 63 0x4>; /* Level high type */
922 reg = <0x0 0x2180000 0x0 0x10000>;
926 <&clockgen QORIQ_CLK_SYSCLK 0>;
928 fsl,clk-source = /bits/ 8 <0>;
934 reg = <0x0 0x2190000 0x0 0x10000>;
938 <&clockgen QORIQ_CLK_SYSCLK 0>;
940 fsl,clk-source = /bits/ 8 <0>;
946 reg = <0x0 0x21c0000 0x0 0x1000>;
954 reg = <0x0 0x21d0000 0x0 0x1000>;
962 reg = <0x0 0x21e0000 0x0 0x1000>;
970 reg = <0x0 0x21f0000 0x0 0x1000>;
978 reg = <0x0 0x2300000 0x0 0x10000>;
989 reg = <0x0 0x2310000 0x0 0x10000>;
1000 reg = <0x0 0x2320000 0x0 0x10000>;
1011 reg = <0x0 0x2330000 0x0 0x10000>;
1022 reg = <0x0 0x23a0000 0 0x1000>,
1023 <0x0 0x2390000 0 0x1000>;
1030 reg = <0x0 0x1e34040 0x0 0x1c>;
1037 reg = <0x0 0x2800000 0x0 0x10000>;
1038 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1044 reg = <0x0 0x3100000 0x0 0x10000>;
1047 snps,quirk-frame-length-adjustment = <0x20>;
1056 reg = <0x0 0x3110000 0x0 0x10000>;
1059 snps,quirk-frame-length-adjustment = <0x20>;
1068 reg = <0x0 0x3200000 0x0 0x10000>,
1069 <0x7 0x100520 0x0 0x4>;
1080 reg = <0x0 0x3210000 0x0 0x10000>,
1081 <0x7 0x100520 0x0 0x4>;
1092 reg = <0x0 0x3220000 0x0 0x10000>,
1093 <0x7 0x100520 0x0 0x4>;
1104 reg = <0x0 0x3230000 0x0 0x10000>,
1105 <0x7 0x100520 0x0 0x4>;
1116 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
1117 <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
1129 bus-range = <0x0 0xff>;
1130 … ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1133 interrupt-map-mask = <0 0 0 7>;
1134 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1135 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1136 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1137 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1138 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1144 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
1145 <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
1157 bus-range = <0x0 0xff>;
1158 … ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1161 interrupt-map-mask = <0 0 0 7>;
1162 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1163 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1164 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1165 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1166 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1172 reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
1173 <0x90 0x00000000 0x0 0x00002000>; /* configuration space */
1185 bus-range = <0x0 0xff>;
1186 … ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1189 interrupt-map-mask = <0 0 0 7>;
1190 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1191 <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1192 <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1193 <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1194 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1200 reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */
1201 <0x98 0x00000000 0x0 0x00002000>; /* configuration space */
1213 bus-range = <0x0 0xff>;
1214 … ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1217 interrupt-map-mask = <0 0 0 7>;
1218 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1219 <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1220 <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1221 <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1222 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1228 reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */
1229 <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
1241 bus-range = <0x0 0xff>;
1242 … ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1245 interrupt-map-mask = <0 0 0 7>;
1246 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
1247 <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
1248 <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1249 <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
1250 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1256 reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */
1257 <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
1269 bus-range = <0x0 0xff>;
1270 … ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1273 interrupt-map-mask = <0 0 0 7>;
1274 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1275 <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1276 <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1277 <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1278 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1284 reg = <0 0x5000000 0 0x800000>;
1295 // performance counter interrupts 0-9
1376 reg = <0x00000000 0x08340020 0 0x2>;
1381 reg = <0x0 0x8b95000 0x0 0x100>;
1388 /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
1391 reg = <0x0 0x8b96000 0x0 0x1000>;
1394 #size-cells = <0>;
1404 reg = <0x0 0x8b97000 0x0 0x1000>;
1408 #size-cells = <0>;
1417 reg = <0x0 0x8c07000 0x0 0x1000>;
1420 #size-cells = <0>;
1423 pcs1: ethernet-phy@0 {
1424 reg = <0>;
1430 reg = <0x0 0x8c0b000 0x0 0x1000>;
1433 #size-cells = <0>;
1436 pcs2: ethernet-phy@0 {
1437 reg = <0>;
1443 reg = <0x0 0x8c0f000 0x0 0x1000>;
1446 #size-cells = <0>;
1449 pcs3: ethernet-phy@0 {
1450 reg = <0>;
1456 reg = <0x0 0x8c13000 0x0 0x1000>;
1459 #size-cells = <0>;
1462 pcs4: ethernet-phy@0 {
1463 reg = <0>;
1469 reg = <0x0 0x8c17000 0x0 0x1000>;
1472 #size-cells = <0>;
1475 pcs5: ethernet-phy@0 {
1476 reg = <0>;
1482 reg = <0x0 0x8c1b000 0x0 0x1000>;
1485 #size-cells = <0>;
1488 pcs6: ethernet-phy@0 {
1489 reg = <0>;
1495 reg = <0x0 0x8c1f000 0x0 0x1000>;
1498 #size-cells = <0>;
1501 pcs7: ethernet-phy@0 {
1502 reg = <0>;
1508 reg = <0x0 0x8c23000 0x0 0x1000>;
1511 #size-cells = <0>;
1514 pcs8: ethernet-phy@0 {
1515 reg = <0>;
1521 reg = <0x0 0x8c27000 0x0 0x1000>;
1524 #size-cells = <0>;
1527 pcs9: ethernet-phy@0 {
1528 reg = <0>;
1534 reg = <0x0 0x8c2b000 0x0 0x1000>;
1537 #size-cells = <0>;
1540 pcs10: ethernet-phy@0 {
1541 reg = <0>;
1547 reg = <0x0 0x8c2f000 0x0 0x1000>;
1550 #size-cells = <0>;
1553 pcs11: ethernet-phy@0 {
1554 reg = <0>;
1560 reg = <0x0 0x8c33000 0x0 0x1000>;
1563 #size-cells = <0>;
1566 pcs12: ethernet-phy@0 {
1567 reg = <0>;
1573 reg = <0x0 0x8c37000 0x0 0x1000>;
1576 #size-cells = <0>;
1579 pcs13: ethernet-phy@0 {
1580 reg = <0>;
1586 reg = <0x0 0x8c3b000 0x0 0x1000>;
1589 #size-cells = <0>;
1592 pcs14: ethernet-phy@0 {
1593 reg = <0>;
1599 reg = <0x0 0x8c3f000 0x0 0x1000>;
1602 #size-cells = <0>;
1605 pcs15: ethernet-phy@0 {
1606 reg = <0>;
1612 reg = <0x0 0x8c43000 0x0 0x1000>;
1615 #size-cells = <0>;
1618 pcs16: ethernet-phy@0 {
1619 reg = <0>;
1625 reg = <0x0 0x8c47000 0x0 0x1000>;
1628 #size-cells = <0>;
1631 pcs17: ethernet-phy@0 {
1632 reg = <0>;
1638 reg = <0x0 0x8c4b000 0x0 0x1000>;
1641 #size-cells = <0>;
1644 pcs18: ethernet-phy@0 {
1645 reg = <0>;
1651 reg = <0x00000008 0x0c000000 0 0x40>,
1652 <0x00000000 0x08340000 0 0x40000>;
1655 iommu-map = <0 &smmu 0 0>;
1661 * Region type 0x0 - MC portals
1662 * Region type 0x1 - QBMAN portals
1664 ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
1665 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
1672 #size-cells = <0>;
1676 reg = <0x1>;
1682 reg = <0x2>;
1688 reg = <0x3>;
1694 reg = <0x4>;
1700 reg = <0x5>;
1706 reg = <0x6>;
1712 reg = <0x7>;
1718 reg = <0x8>;
1724 reg = <0x9>;
1730 reg = <0xa>;
1736 reg = <0xb>;
1742 reg = <0xc>;
1748 reg = <0xd>;
1754 reg = <0xe>;
1760 reg = <0xf>;
1766 reg = <0x10>;
1772 reg = <0x11>;
1778 reg = <0x12>;