Lines Matching +full:phy +full:- +full:handle

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5  * Copyright 2019-2021 NXP
8  * Requires a SCH-30841 card with lane A of connector rewired to PHY lane C.
9  * Set-up is a SCH-30842 card in slot 1 and SCH-30841 in slot 2.
12 /dts-v1/;
16 	#address-cells = <1>;
17 	#size-cells = <0>;
19 	slot1_sgmii: ethernet-phy@2 {
22 		compatible = "ethernet-phy-ieee802.3-c45";
27 	phy-handle = <&slot1_sgmii>;
28 	phy-mode = "usxgmii";
29 	managed = "in-band-status";
34 	#address-cells = <1>;
35 	#size-cells = <0>;
38 	slot2_qxgmii0: ethernet-phy@0 {
40 		compatible = "ethernet-phy-ieee802.3-c45";
43 	slot2_qxgmii1: ethernet-phy@1 {
45 		compatible = "ethernet-phy-ieee802.3-c45";
48 	slot2_qxgmii2: ethernet-phy@2 {
50 		compatible = "ethernet-phy-ieee802.3-c45";
53 	slot2_qxgmii3: ethernet-phy@3 {
55 		compatible = "ethernet-phy-ieee802.3-c45";
62 		phy-handle = <&slot2_qxgmii0>;
63 		phy-mode = "usxgmii";
64 		managed = "in-band-status";
69 		phy-handle = <&slot2_qxgmii1>;
70 		phy-mode = "usxgmii";
71 		managed = "in-band-status";
76 		phy-handle = <&slot2_qxgmii2>;
77 		phy-mode = "usxgmii";
78 		managed = "in-band-status";
83 		phy-handle = <&slot2_qxgmii3>;
84 		phy-mode = "usxgmii";
85 		managed = "in-band-status";