Lines Matching +full:0 +full:x0000002d
32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
94 <0x0 0x1404000 0 0x2000>, /* GICH */
95 <0x0 0x1406000 0 0x2000>; /* GICV */
102 offset = <0xb0>;
103 mask = <0x02>;
110 thermal-sensors = <&tmu 0>;
146 #size-cells = <0>;
147 reg = <0x0 0x1550000 0x0 0x10000>,
148 <0x0 0x40000000 0x0 0x10000000>;
161 reg = <0x0 0x1560000 0x0 0x10000>;
162 interrupts = <0 62 0x4>;
174 reg = <0x0 0x1570000 0x0 0x10000>;
180 reg = <0x0 0x1580000 0x0 0x10000>;
181 interrupts = <0 65 0x4>;
193 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
194 "fsl,sec-v4.0";
198 ranges = <0x0 0x00 0x1700000 0x100000>;
199 reg = <0x00 0x1700000 0x0 0x100000>;
205 "fsl,sec-v5.0-job-ring",
206 "fsl,sec-v4.0-job-ring";
207 reg = <0x10000 0x10000>;
213 "fsl,sec-v5.0-job-ring",
214 "fsl,sec-v4.0-job-ring";
215 reg = <0x20000 0x10000>;
221 "fsl,sec-v5.0-job-ring",
222 "fsl,sec-v4.0-job-ring";
223 reg = <0x30000 0x10000>;
229 "fsl,sec-v5.0-job-ring",
230 "fsl,sec-v4.0-job-ring";
231 reg = <0x40000 0x10000>;
237 "fsl,sec-v5.0-rtic",
238 "fsl,sec-v4.0-rtic";
241 reg = <0x60000 0x100>, <0x60e00 0x18>;
242 ranges = <0x0 0x60100 0x500>;
244 rtic_a: rtic-a@0 {
246 "fsl,sec-v5.0-rtic-memory",
247 "fsl,sec-v4.0-rtic-memory";
248 reg = <0x00 0x20>, <0x100 0x100>;
253 "fsl,sec-v5.0-rtic-memory",
254 "fsl,sec-v4.0-rtic-memory";
255 reg = <0x20 0x20>, <0x200 0x100>;
260 "fsl,sec-v5.0-rtic-memory",
261 "fsl,sec-v4.0-rtic-memory";
262 reg = <0x40 0x20>, <0x300 0x100>;
267 "fsl,sec-v5.0-rtic-memory",
268 "fsl,sec-v4.0-rtic-memory";
269 reg = <0x60 0x20>, <0x400 0x100>;
276 reg = <0x0 0x1e80000 0x0 0x10000>;
283 compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
284 "fsl,sec-v4.0-mon";
285 reg = <0x0 0x1e90000 0x0 0x10000>;
293 reg = <0x0 0x1ee0000 0x0 0x10000>;
299 reg = <0x0 0x1ee1000 0x0 0x1000>;
307 reg = <0x0 0x1f00000 0x0 0x10000>;
308 interrupts = <0 33 0x4>;
309 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x60062>;
310 fsl,tmu-calibration = <0x00000000 0x00000025
311 0x00000001 0x0000002c
312 0x00000002 0x00000032
313 0x00000003 0x00000039
314 0x00000004 0x0000003f
315 0x00000005 0x00000046
316 0x00000006 0x0000004c
317 0x00000007 0x00000053
318 0x00000008 0x00000059
319 0x00000009 0x0000005f
320 0x0000000a 0x00000066
321 0x0000000b 0x0000006c
323 0x00010000 0x00000026
324 0x00010001 0x0000002d
325 0x00010002 0x00000035
326 0x00010003 0x0000003d
327 0x00010004 0x00000045
328 0x00010005 0x0000004d
329 0x00010006 0x00000055
330 0x00010007 0x0000005d
331 0x00010008 0x00000065
332 0x00010009 0x0000006d
334 0x00020000 0x00000026
335 0x00020001 0x00000030
336 0x00020002 0x0000003a
337 0x00020003 0x00000044
338 0x00020004 0x0000004e
339 0x00020005 0x00000059
340 0x00020006 0x00000063
342 0x00030000 0x00000014
343 0x00030001 0x00000021
344 0x00030002 0x0000002e
345 0x00030003 0x0000003a
346 0x00030004 0x00000047
347 0x00030005 0x00000053
348 0x00030006 0x00000060>;
356 #size-cells = <0>;
357 reg = <0x0 0x2180000 0x0 0x10000>;
358 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
367 #size-cells = <0>;
368 reg = <0x0 0x2190000 0x0 0x10000>;
369 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
376 compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
378 #size-cells = <0>;
379 reg = <0x0 0x2100000 0x0 0x10000>;
380 interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
391 reg = <0x00 0x21c0500 0x0 0x100>;
392 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
400 reg = <0x00 0x21c0600 0x0 0x100>;
401 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
409 reg = <0x0 0x2300000 0x0 0x10000>;
410 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
419 reg = <0x0 0x2310000 0x0 0x10000>;
420 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
430 reg = <0x0 0x2ad0000 0x0 0x10000>;
431 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
437 #sound-dai-cells = <0>;
439 reg = <0x0 0x2b50000 0x0 0x10000>;
440 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
457 #sound-dai-cells = <0>;
459 reg = <0x0 0x2b60000 0x0 0x10000>;
460 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
479 reg = <0x0 0x2c00000 0x0 0x10000>,
480 <0x0 0x2c10000 0x0 0x10000>,
481 <0x0 0x2c20000 0x0 0x10000>;
482 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
483 <0 103 IRQ_TYPE_LEVEL_HIGH>;
496 reg = <0x0 0x2f00000 0x0 0x10000>;
497 interrupts = <0 60 0x4>;
499 snps,quirk-frame-length-adjustment = <0x20>;
506 reg = <0x0 0x3200000 0x0 0x10000>,
507 <0x0 0x20140520 0x0 0x4>;
509 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
518 reg = <0x0 0x8600000 0x0 0x1000>;
519 interrupts = <0 139 0x4>;
526 reg = <0x0 0x1572000 0x0 0x8>;
528 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
533 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
534 <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
536 interrupts = <0 118 0x4>, /* controller interrupt */
537 <0 117 0x4>; /* PME interrupt */
543 bus-range = <0x0 0xff>;
544 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
545 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
548 interrupt-map-mask = <0 0 0 7>;
549 interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
550 <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
551 <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
552 <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
558 reg = <0x0 0x1ee2140 0x0 0x4>;
564 reg = <0x0 0x29d0000 0x0 0x10000>;
565 fsl,rcpm-wakeup = <&rcpm 0x20000>;