Lines Matching +full:0 +full:x15571800
45 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu_atlas0: cpu@0 {
55 reg = <0x0>;
57 i-cache-size = <0xc000>;
60 d-cache-size = <0x8000>;
69 reg = <0x1>;
71 i-cache-size = <0xc000>;
74 d-cache-size = <0x8000>;
83 reg = <0x2>;
85 i-cache-size = <0xc000>;
88 d-cache-size = <0x8000>;
97 reg = <0x3>;
99 i-cache-size = <0xc000>;
102 d-cache-size = <0x8000>;
112 cache-size = <0x200000>;
121 cpu_off = <0x84000002>;
122 cpu_on = <0xc4000003>;
125 soc: soc@0 {
129 ranges = <0 0 0 0x18000000>;
133 reg = <0x10000000 0x100>;
139 #address-cells = <0>;
141 reg = <0x11001000 0x1000>,
142 <0x11002000 0x2000>,
143 <0x11004000 0x2000>,
144 <0x11006000 0x2000>;
149 reg = <0x10e10000 0x1000>;
158 reg = <0x10eb0000 0x1000>;
167 reg = <0x10570000 0x10000>;
173 reg = <0x105d0000 0xb000>;
187 reg = <0x105e0000 0xb000>;
200 reg = <0x105b0000 0xd00>;
208 reg = <0x13610000 0xd00>;
218 reg = <0x14c80000 0xd00>;
250 reg = <0x10040000 0xd00>;
258 reg = <0x10e90000 0xd00>;
268 reg = <0x156e0000 0xd00>;
284 reg = <0x13630000 0x100>;
294 reg = <0x14c20000 0x100>;
304 reg = <0x14c30000 0x100>;
314 reg = <0x14c40000 0x100>;
324 reg = <0x10580000 0x1000>;
335 reg = <0x13470000 0x1000>;
341 reg = <0x14cd0000 0x1000>;
347 reg = <0x14ce0000 0x1000>;
353 reg = <0x14c90000 0x1000>;
359 reg = <0x14ca0000 0x1000>;
365 reg = <0x10e60000 0x1000>;
371 reg = <0x15690000 0x1000>;
377 reg = <0x14870000 0x1000>;
383 reg = <0x13640000 0x1000>;
386 #size-cells = <0>;
388 pinctrl-0 = <&hs_i2c0_bus>;
396 reg = <0x13650000 0x1000>;
399 #size-cells = <0>;
401 pinctrl-0 = <&hs_i2c1_bus>;
409 reg = <0x14e60000 0x1000>;
412 #size-cells = <0>;
414 pinctrl-0 = <&hs_i2c2_bus>;
422 reg = <0x14e70000 0x1000>;
425 #size-cells = <0>;
427 pinctrl-0 = <&hs_i2c3_bus>;
435 reg = <0x13660000 0x1000>;
438 #size-cells = <0>;
440 pinctrl-0 = <&hs_i2c4_bus>;
448 reg = <0x13670000 0x1000>;
451 #size-cells = <0>;
453 pinctrl-0 = <&hs_i2c5_bus>;
461 reg = <0x14e00000 0x1000>;
464 #size-cells = <0>;
466 pinctrl-0 = <&hs_i2c6_bus>;
474 reg = <0x13e10000 0x1000>;
477 #size-cells = <0>;
479 pinctrl-0 = <&hs_i2c7_bus>;
487 reg = <0x14e20000 0x1000>;
490 #size-cells = <0>;
492 pinctrl-0 = <&hs_i2c8_bus>;
500 reg = <0x13680000 0x1000>;
503 #size-cells = <0>;
505 pinctrl-0 = <&hs_i2c9_bus>;
513 reg = <0x13690000 0x1000>;
516 #size-cells = <0>;
518 pinctrl-0 = <&hs_i2c10_bus>;
526 reg = <0x136a0000 0x1000>;
529 #size-cells = <0>;
531 pinctrl-0 = <&hs_i2c11_bus>;
539 reg = <0x105c0000 0x5000>;
544 reg = <0x10590000 0x100>;
554 reg = <0x101d0000 0x100>;
564 reg = <0x14ac0000 0x5000>;
577 #size-cells = <0>;
578 reg = <0x15740000 0x2000>;
582 fifo-depth = <0x40>;
590 #size-cells = <0>;
591 reg = <0x15750000 0x2000>;
595 fifo-depth = <0x40>;
603 #size-cells = <0>;
604 reg = <0x15560000 0x2000>;
608 fifo-depth = <0x40>;
614 reg = <0x13620000 0x100>;
624 reg = <0x136c0000 0x100>;
630 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
638 reg = <0x10060000 0x200>;
643 #thermal-sensor-cells = <0>;
648 reg = <0x15570000 0x100>, /* 0: HCI standard */
649 <0x15570100 0x100>, /* 1: Vendor specificed */
650 <0x15571000 0x200>, /* 2: UNIPRO */
651 <0x15572000 0x300>; /* 3: UFS protector */
657 freq-table-hz = <0 0>, <0 0>;
659 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
667 reg = <0x15571800 0x240>;
670 #phy-cells = <0>;
682 reg = <0x15500000 0x100>;
702 ranges = <0x0 0x15400000 0x10000>;
704 usb@0 {
706 reg = <0x0 0x10000>;
708 phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
716 polling-delay-passive = <0>; /* milliseconds */
717 polling-delay = <0>; /* milliseconds */