dts/amlogic/amlogic-t7.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 	interrupt-parent = <&gic>;
10 	#address-cells = <2>;
11 	#size-cells = <2>;
14 		#address-cells = <0x2>;
15 		#size-cells = <0x0>;
17 		cpu-map {
20 					cpu = <&cpu100>;
23 					cpu = <&cpu101>;
26 					cpu = <&cpu102>;
29 					cpu = <&cpu103>;
35 					cpu = <&cpu0>;
38 					cpu = <&cpu1>;
41 					cpu = <&cpu2>;
44 					cpu = <&cpu3>;
49 		cpu100: cpu@100 {
50 			device_type = "cpu";
51 			compatible = "arm,cortex-a53";
53 			enable-method = "psci";
56 		cpu101: cpu@101{
57 			device_type = "cpu";
58 			compatible = "arm,cortex-a53";
60 			enable-method = "psci";
63 		cpu102: cpu@102 {
64 			device_type = "cpu";
65 			compatible = "arm,cortex-a53";
67 			enable-method = "psci";
70 		cpu103: cpu@103 {
71 			device_type = "cpu";
72 			compatible = "arm,cortex-a53";
74 			enable-method = "psci";
77 		cpu0: cpu@0 {
78 			device_type = "cpu";
79 			compatible = "arm,cortex-a73";
81 			enable-method = "psci";
84 		cpu1: cpu@1 {
85 			device_type = "cpu";
86 			compatible = "arm,cortex-a73";
88 			enable-method = "psci";
91 		cpu2: cpu@2 {
92 			device_type = "cpu";
93 			compatible = "arm,cortex-a73";
95 			enable-method = "psci";
98 		cpu3: cpu@3 {
99 			device_type = "cpu";
100 			compatible = "arm,cortex-a73";
102 			enable-method = "psci";
107 		compatible = "arm,armv8-timer";
108 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
109 			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
110 			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
111 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
115 		compatible = "arm,psci-1.0";
119 	sm: secure-monitor {
120 		compatible = "amlogic,meson-gxbb-sm";
124 		compatible = "simple-bus";
125 		#address-cells = <2>;
126 		#size-cells = <2>;
129 		gic: interrupt-controller@fff01000 {
130 			compatible = "arm,gic-400";
131 			#interrupt-cells = <3>;
132 			#address-cells = <0>;
133 			interrupt-controller;
136 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
140 			compatible = "simple-bus";
142 			#address-cells = <2>;
143 			#size-cells = <2>;
147 				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";