Lines Matching +full:qspi +full:- +full:ocp
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
22 compatible = "shared-dma-pool";
25 no-map;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53";
43 enable-method = "psci";
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
55 compatible = "arm,cortex-a53";
57 enable-method = "psci";
63 compatible = "arm,armv8-pmuv3";
68 interrupt-affinity = <&cpu0>,
72 interrupt-parent = <&intc>;
76 compatible = "arm,psci-0.2";
82 compatible = "arm,armv8-timer";
87 interrupt-parent = <&intc>;
90 intc: interrupt-controller@fffc1000 {
91 compatible = "arm,gic-400", "arm,cortex-a15-gic";
92 #interrupt-cells = <3>;
93 interrupt-controller;
101 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
102 #clock-cells = <0>;
103 compatible = "fixed-clock";
106 cb_intosc_ls_clk: cb-intosc-ls-clk {
107 #clock-cells = <0>;
108 compatible = "fixed-clock";
111 f2s_free_clk: f2s-free-clk {
112 #clock-cells = <0>;
113 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 compatible = "fixed-clock";
121 qspi_clk: qspi-clk {
122 #clock-cells = <0>;
123 compatible = "fixed-clock";
124 clock-frequency = <200000000>;
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
133 interrupt-parent = <&intc>;
137 #address-cells = <0x2>;
138 #size-cells = <0x2>;
139 compatible = "fpga-region";
140 fpga-mgr = <&fpga_mgr>;
143 clkmgr: clock-controller@ffd10000 {
144 compatible = "intel,stratix10-clkmgr";
146 #clock-cells = <1>;
150 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
153 interrupt-names = "macirq";
154 mac-address = [00 00 00 00 00 00];
156 reset-names = "stmmaceth", "ahb";
158 clock-names = "stmmaceth", "ptp_ref";
159 tx-fifo-depth = <16384>;
160 rx-fifo-depth = <16384>;
161 snps,multicast-filter-bins = <256>;
163 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
168 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
171 interrupt-names = "macirq";
172 mac-address = [00 00 00 00 00 00];
174 reset-names = "stmmaceth", "ahb";
176 clock-names = "stmmaceth", "ptp_ref";
177 tx-fifo-depth = <16384>;
178 rx-fifo-depth = <16384>;
179 snps,multicast-filter-bins = <256>;
181 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
186 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
189 interrupt-names = "macirq";
190 mac-address = [00 00 00 00 00 00];
192 reset-names = "stmmaceth", "ahb";
194 clock-names = "stmmaceth", "ptp_ref";
195 tx-fifo-depth = <16384>;
196 rx-fifo-depth = <16384>;
197 snps,multicast-filter-bins = <256>;
199 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
204 #address-cells = <1>;
205 #size-cells = <0>;
206 compatible = "snps,dw-apb-gpio";
211 porta: gpio-controller@0 {
212 compatible = "snps,dw-apb-gpio-port";
213 gpio-controller;
214 #gpio-cells = <2>;
217 interrupt-controller;
218 #interrupt-cells = <2>;
224 #address-cells = <1>;
225 #size-cells = <0>;
226 compatible = "snps,dw-apb-gpio";
231 portb: gpio-controller@0 {
232 compatible = "snps,dw-apb-gpio-port";
233 gpio-controller;
234 #gpio-cells = <2>;
237 interrupt-controller;
238 #interrupt-cells = <2>;
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "snps,designware-i2c";
255 #address-cells = <1>;
256 #size-cells = <0>;
257 compatible = "snps,designware-i2c";
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "snps,designware-i2c";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "snps,designware-i2c";
288 #address-cells = <1>;
289 #size-cells = <0>;
290 compatible = "snps,designware-i2c";
299 #address-cells = <1>;
300 #size-cells = <0>;
301 compatible = "altr,socfpga-dw-mshc";
304 fifo-depth = <0x400>;
306 reset-names = "reset";
309 clock-names = "biu", "ciu";
311 altr,sysmgr-syscon = <&sysmgr 0x28 4>;
315 nand: nand-controller@ffb90000 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "altr,socfpga-denali-nand";
321 reg-names = "nand_data", "denali_reg";
326 clock-names = "nand", "nand_x", "ecc";
332 compatible = "mmio-sram";
334 #address-cells = <1>;
335 #size-cells = <1>;
339 pdma: dma-controller@ffda0000 {
351 #dma-cells = <1>;
353 clock-names = "apb_pclk";
355 reset-names = "dma", "dma-ocp";
359 compatible = "pinctrl-single";
361 #pinctrl-cells = <1>;
362 pinctrl-single,register-width = <32>;
363 pinctrl-single,function-mask = <0x0000000f>;
367 compatible = "pinctrl-single";
369 #pinctrl-cells = <1>;
370 pinctrl-single,register-width = <32>;
371 pinctrl-single,function-mask = <0x0000000f>;
375 #reset-cells = <1>;
376 compatible = "altr,stratix10-rst-mgr";
381 compatible = "arm,mmu-500", "arm,smmu-v2";
383 #global-interrupts = <2>;
384 #iommu-cells = <1>;
386 clock-names = "iommu";
387 interrupt-parent = <&intc>;
389 <0 129 4>, /* Global Non-secure Fault */
390 /* Non-secure Context Interrupts (32) */
399 stream-match-mask = <0x7ff0>;
404 compatible = "snps,dw-apb-ssi";
405 #address-cells = <1>;
406 #size-cells = <0>;
410 reset-names = "spi";
411 reg-io-width = <4>;
412 num-cs = <4>;
418 compatible = "snps,dw-apb-ssi";
419 #address-cells = <1>;
420 #size-cells = <0>;
424 reset-names = "spi";
425 reg-io-width = <4>;
426 num-cs = <4>;
432 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
437 compatible = "snps,dw-apb-timer";
441 clock-names = "timer";
445 compatible = "snps,dw-apb-timer";
449 clock-names = "timer";
453 compatible = "snps,dw-apb-timer";
457 clock-names = "timer";
461 compatible = "snps,dw-apb-timer";
465 clock-names = "timer";
469 compatible = "snps,dw-apb-uart";
472 reg-shift = <2>;
473 reg-io-width = <4>;
480 compatible = "snps,dw-apb-uart";
483 reg-shift = <2>;
484 reg-io-width = <4>;
495 phy-names = "usb2-phy";
497 reset-names = "dwc2", "dwc2-ecc";
499 clock-names = "otg";
509 phy-names = "usb2-phy";
511 reset-names = "dwc2", "dwc2-ecc";
518 compatible = "snps,dw-wdt";
527 compatible = "snps,dw-wdt";
536 compatible = "snps,dw-wdt";
545 compatible = "snps,dw-wdt";
554 compatible = "altr,sdr-ctl", "syscon";
559 compatible = "altr,socfpga-s10-ecc-manager",
560 "altr,socfpga-a10-ecc-manager";
561 altr,sysmgr-syscon = <&sysmgr>;
562 #address-cells = <1>;
563 #size-cells = <1>;
565 interrupt-controller;
566 #interrupt-cells = <2>;
570 compatible = "altr,sdram-edac-s10";
571 altr,sdr-syscon = <&sdr>;
575 ocram-ecc@ff8cc000 {
576 compatible = "altr,socfpga-s10-ocram-ecc",
577 "altr,socfpga-a10-ocram-ecc";
579 altr,ecc-parent = <&ocram>;
583 usb0-ecc@ff8c4000 {
584 compatible = "altr,socfpga-s10-usb-ecc",
585 "altr,socfpga-usb-ecc";
587 altr,ecc-parent = <&usb0>;
591 emac0-rx-ecc@ff8c0000 {
592 compatible = "altr,socfpga-s10-eth-mac-ecc",
593 "altr,socfpga-eth-mac-ecc";
595 altr,ecc-parent = <&gmac0>;
599 emac0-tx-ecc@ff8c0400 {
600 compatible = "altr,socfpga-s10-eth-mac-ecc",
601 "altr,socfpga-eth-mac-ecc";
603 altr,ecc-parent = <&gmac0>;
609 qspi: spi@ff8d2000 { label
610 compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
611 #address-cells = <1>;
612 #size-cells = <0>;
616 cdns,fifo-depth = <128>;
617 cdns,fifo-width = <4>;
618 cdns,trigger-address = <0x00000000>;
626 compatible = "intel,stratix10-svc";
628 memory-region = <&service_reserved>;
630 fpga_mgr: fpga-mgr {
631 compatible = "intel,stratix10-soc-fpga-mgr";
638 compatible = "usb-nop-xceiv";
639 #phy-cells = <0>;