Lines Matching +full:0 +full:x05101800
22 #size-cells = <0>;
24 cpu0: cpu@0 {
27 reg = <0>;
72 #clock-cells = <0>;
114 reg = <0x1000000 0x400000>;
118 ranges = <0 0x1000000 0x400000>;
120 display_clocks: clock@0 {
122 reg = <0x0 0x10000>;
133 compatible = "allwinner,sun50i-h6-de3-mixer-0";
134 reg = <0x100000 0x100000>;
140 iommus = <&iommu 0>;
144 #size-cells = <0>;
159 reg = <0x01c00000 0x1000>;
169 reg = <0x01c0e000 0x2000>;
182 reg = <0x01800000 0x4000>;
196 reg = <0x01904000 0x1000>;
206 reg = <0x03000000 0x1000>;
213 reg = <0x00028000 0x1e000>;
216 ranges = <0 0x00028000 0x1e000>;
218 de2_sram: sram-section@0 {
221 reg = <0x0000 0x1e000>;
227 reg = <0x01a00000 0x200000>;
230 ranges = <0 0x01a00000 0x200000>;
232 ve_sram: sram-section@0 {
235 reg = <0x000000 0x200000>;
242 reg = <0x03001000 0x1000>;
251 reg = <0x03002000 0x1000>;
264 reg = <0x03003000 0x1000>;
273 reg = <0x03006000 0x400>;
278 reg = <0x14 0x8>;
282 reg = <0x1c 0x4>;
289 reg = <0x03009000 0xa0>;
298 reg = <0x030090a0 0x20>;
307 reg = <0x0300a000 0x400>;
317 reg = <0x0300b000 0x400>;
433 reg = <0x03021000 0x1000>,
434 <0x03022000 0x2000>,
435 <0x03024000 0x2000>,
436 <0x03026000 0x2000>;
444 reg = <0x030f0000 0x10000>;
454 reg = <0x04020000 0x1000>;
461 pinctrl-0 = <&mmc0_pins>;
465 #size-cells = <0>;
471 reg = <0x04021000 0x1000>;
478 pinctrl-0 = <&mmc1_pins>;
482 #size-cells = <0>;
488 reg = <0x04022000 0x1000>;
495 pinctrl-0 = <&mmc2_pins>;
499 #size-cells = <0>;
504 reg = <0x05000000 0x400>;
505 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
515 reg = <0x05000400 0x400>;
526 reg = <0x05000800 0x400>;
537 reg = <0x05000c00 0x400>;
549 reg = <0x05002000 0x400>;
554 pinctrl-0 = <&i2c0_pins>;
557 #size-cells = <0>;
563 reg = <0x05002400 0x400>;
568 pinctrl-0 = <&i2c1_pins>;
571 #size-cells = <0>;
577 reg = <0x05002800 0x400>;
582 pinctrl-0 = <&i2c2_pins>;
585 #size-cells = <0>;
591 reg = <0x05010000 0x1000>;
600 #size-cells = <0>;
606 reg = <0x05011000 0x1000>;
615 #size-cells = <0>;
622 reg = <0x05020000 0x10000>;
634 #size-cells = <0>;
639 #sound-dai-cells = <0>;
641 reg = <0x05091000 0x1000>;
652 #sound-dai-cells = <0>;
654 reg = <0x05093000 0x400>;
667 reg = <0x05100000 0x0400>;
672 phys = <&usb2phy 0>;
674 extcon = <&usb2phy 0>;
680 reg = <0x05100400 0x24>,
681 <0x05101800 0x4>,
682 <0x05311800 0x4>;
700 reg = <0x05101000 0x100>;
707 phys = <&usb2phy 0>;
714 reg = <0x05101400 0x100>;
719 phys = <&usb2phy 0>;
726 reg = <0x05200000 0x10000>;
749 reg = <0x5210000 0x10000>;
752 #phy-cells = <0>;
758 reg = <0x05311000 0x100>;
772 reg = <0x05311400 0x100>;
784 reg = <0x06000000 0x10000>;
797 pinctrl-0 = <&hdmi_pins>;
802 #size-cells = <0>;
804 hdmi_in: port@0 {
805 reg = <0>;
820 reg = <0x06010000 0x10000>;
825 #phy-cells = <0>;
830 reg = <0x06510000 0x1000>;
841 #size-cells = <0>;
843 tcon_top_mixer0_in: port@0 {
845 #size-cells = <0>;
846 reg = <0>;
848 tcon_top_mixer0_in_mixer0: endpoint@0 {
849 reg = <0>;
856 #size-cells = <0>;
867 #size-cells = <0>;
870 tcon_top_hdmi_in_tcon_tv: endpoint@0 {
871 reg = <0>;
889 reg = <0x06515000 0x1000>;
900 #size-cells = <0>;
902 tcon_tv_in: port@0 {
903 reg = <0>;
912 #size-cells = <0>;
925 reg = <0x07000000 0x400>;
935 reg = <0x07010000 0x400>;
946 reg = <0x07020400 0x20>;
955 reg = <0x07021000 0x400>;
961 reg = <0x07022000 0x400>;
992 reg = <0x07040000 0x400>;
999 pinctrl-0 = <&r_ir_rx_pin>;
1006 reg = <0x07081400 0x400>;
1011 pinctrl-0 = <&r_i2c_pins>;
1014 #size-cells = <0>;
1019 reg = <0x07083000 0x400>;
1025 pinctrl-0 = <&r_rsb_pins>;
1028 #size-cells = <0>;
1033 reg = <0x05070400 0x100>;
1046 polling-delay-passive = <0>;
1047 polling-delay = <0>;
1048 thermal-sensors = <&ths 0>;
1059 hysteresis = <0>;
1081 gpu_alert0: gpu-alert-0 {
1101 hysteresis = <0>;