Lines Matching +full:0 +full:x01c1a800
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
124 #clock-cells = <0>;
131 #clock-cells = <0>;
153 #size-cells = <0>;
164 simple-audio-card,dai-link@0 {
175 sound-dai = <&codec 0>;
197 polling-delay-passive = <0>;
198 polling-delay = <0>;
199 thermal-sensors = <&ths 0>;
244 polling-delay-passive = <0>;
245 polling-delay = <0>;
251 polling-delay-passive = <0>;
252 polling-delay = <0>;
265 reg = <0x1000000 0x400000>;
269 ranges = <0 0x1000000 0x400000>;
271 display_clocks: clock@0 {
273 reg = <0x0 0x10000>;
286 reg = <0x20000 0x10000>;
296 compatible = "allwinner,sun50i-a64-de2-mixer-0";
297 reg = <0x100000 0x100000>;
306 #size-cells = <0>;
310 #size-cells = <0>;
313 mixer0_out_tcon0: endpoint@0 {
314 reg = <0>;
328 reg = <0x200000 0x100000>;
337 #size-cells = <0>;
341 #size-cells = <0>;
344 mixer1_out_tcon0: endpoint@0 {
345 reg = <0>;
360 reg = <0x01c00000 0x1000>;
367 reg = <0x00018000 0x28000>;
370 ranges = <0 0x00018000 0x28000>;
372 de2_sram: sram-section@0 {
374 reg = <0x0000 0x28000>;
380 reg = <0x01d00000 0x40000>;
383 ranges = <0 0x01d00000 0x40000>;
385 ve_sram: sram-section@0 {
388 reg = <0x000000 0x40000>;
395 reg = <0x01c02000 0x1000>;
407 reg = <0x01c0c000 0x1000>;
412 #clock-cells = <0>;
420 #size-cells = <0>;
422 tcon0_in: port@0 {
424 #size-cells = <0>;
425 reg = <0>;
427 tcon0_in_mixer0: endpoint@0 {
428 reg = <0>;
440 #size-cells = <0>;
455 reg = <0x01c0d000 0x1000>;
464 #size-cells = <0>;
466 tcon1_in: port@0 {
468 #size-cells = <0>;
469 reg = <0>;
471 tcon1_in_mixer0: endpoint@0 {
472 reg = <0>;
484 #size-cells = <0>;
497 reg = <0x01c0e000 0x1000>;
508 reg = <0x01c0f000 0x1000>;
517 #size-cells = <0>;
522 reg = <0x01c10000 0x1000>;
531 #size-cells = <0>;
536 reg = <0x01c11000 0x1000>;
545 #size-cells = <0>;
550 reg = <0x1c14000 0x400>;
555 reg = <0x34 0x8>;
561 reg = <0x01c15000 0x1000>;
571 reg = <0x01c17000 0x1000>;
580 reg = <0x01c19000 0x0400>;
585 phys = <&usbphy 0>;
587 extcon = <&usbphy 0>;
594 reg = <0x01c19400 0x14>,
595 <0x01c1a800 0x4>,
596 <0x01c1b800 0x4>;
614 reg = <0x01c1a000 0x100>;
621 phys = <&usbphy 0>;
628 reg = <0x01c1a400 0x100>;
633 phys = <&usbphy 0>;
640 reg = <0x01c1b000 0x100>;
654 reg = <0x01c1b400 0x100>;
666 reg = <0x01c20000 0x400>;
675 reg = <0x01c20800 0x400>;
843 reg = <0x01c20c00 0xa0>;
852 reg = <0x01c20ca0 0x20>;
858 #sound-dai-cells = <0>;
861 reg = <0x01c21000 0x400>;
869 pinctrl-0 = <&spdif_tx_pin>;
876 reg = <0x01c21800 0x400>;
883 #sound-dai-cells = <0>;
886 reg = <0x01c22000 0x400>;
897 #sound-dai-cells = <0>;
900 reg = <0x01c22400 0x400>;
911 #sound-dai-cells = <0>;
914 reg = <0x01c22800 0x400>;
925 #sound-dai-cells = <0>;
927 reg = <0x01c22c00 0x200>;
941 reg = <0x01c22e00 0x600>;
950 reg = <0x01c25000 0x100>;
962 reg = <0x01c28000 0x400>;
963 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
973 reg = <0x01c28400 0x400>;
984 reg = <0x01c28800 0x400>;
995 reg = <0x01c28c00 0x400>;
1006 reg = <0x01c29000 0x400>;
1017 reg = <0x01c2ac00 0x400>;
1022 pinctrl-0 = <&i2c0_pins>;
1025 #size-cells = <0>;
1030 reg = <0x01c2b000 0x400>;
1035 pinctrl-0 = <&i2c1_pins>;
1038 #size-cells = <0>;
1043 reg = <0x01c2b400 0x400>;
1048 pinctrl-0 = <&i2c2_pins>;
1051 #size-cells = <0>;
1056 reg = <0x01c68000 0x1000>;
1063 pinctrl-0 = <&spi0_pins>;
1068 #size-cells = <0>;
1073 reg = <0x01c69000 0x1000>;
1080 pinctrl-0 = <&spi1_pins>;
1085 #size-cells = <0>;
1091 reg = <0x01c30000 0x10000>;
1103 #size-cells = <0>;
1109 reg = <0x01c40000 0x10000>;
1132 reg = <0x01c81000 0x1000>,
1133 <0x01c82000 0x2000>,
1134 <0x01c84000 0x2000>,
1135 <0x01c86000 0x2000>;
1144 reg = <0x01c21400 0x400>;
1147 pinctrl-0 = <&pwm_pin>;
1154 reg = <0x01c62000 0x1000>,
1155 <0x01c63000 0x1000>;
1164 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1170 reg = <0x01cb0000 0x1000>;
1178 pinctrl-0 = <&csi_pins>;
1184 reg = <0x01ca0000 0x1000>;
1192 #size-cells = <0>;
1204 reg = <0x01ca1000 0x1000>;
1211 #phy-cells = <0>;
1217 reg = <0x01e00000 0x20000>;
1231 reg = <0x01ee0000 0x10000>;
1245 #size-cells = <0>;
1247 hdmi_in: port@0 {
1248 reg = <0>;
1263 reg = <0x01ef0000 0x10000>;
1266 clock-names = "bus", "mod", "pll-0";
1269 #phy-cells = <0>;
1275 reg = <0x01f00000 0x400>;
1289 reg = <0x01f00c00 0x400>;
1295 reg = <0x01f01400 0x100>;
1305 reg = <0x01f015c0 0x4>;
1312 reg = <0x01f02400 0x400>;
1318 #size-cells = <0>;
1324 reg = <0x01f02000 0x400>;
1330 pinctrl-0 = <&r_ir_rx_pin>;
1337 reg = <0x01f03800 0x400>;
1340 pinctrl-0 = <&r_pwm_pin>;
1347 reg = <0x01f02c00 0x400>;
1380 reg = <0x01f03400 0x400>;
1386 pinctrl-0 = <&r_rsb_pins>;
1389 #size-cells = <0>;