Lines Matching full:cortex
440 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce…
445 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
448 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
462 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th…
467 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
484 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
489 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
492 If a Cortex-A53 processor is executing a store or prefetch for
507 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
512 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
529 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
533 erratum 832075 on Cortex-A57 parts up to r1p2.
535 Affected Cortex-A57 parts might deadlock when exclusive load/store
547 …bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a…
552 erratum 834220 on Cortex-A57 parts up to r1p2.
554 Affected Cortex-A57 parts might report a Stage 2 translation
568 …bool "Cortex-A57/A72: 1742098: ELR recorded incorrectly on interrupt taken between cryptographic i…
573 workaround erratum 1742098 on Cortex-A57 and Cortex-A72.
584 bool "Cortex-A53: 845719: a load might read incorrect data"
589 erratum 845719 on Cortex-A53 parts up to r0p4.
591 When running a compat (AArch32) userspace on an affected Cortex-A53
605 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
608 This option links the kernel with '--fix-cortex-a53-843419' and
611 Cortex-A53 parts up to r0p4.
616 def_bool $(ld-option,--fix-cortex-a53-843419)
619 …bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorre…
622 This option adds a workaround for ARM Cortex-A55 Erratum 1024718.
624 Affected Cortex-A55 cores (all revisions) could cause incorrect
633 …bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 mi…
637 This option adds a workaround for ARM Cortex-A76/Neoverse-N1
640 Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
650 …bool "Cortex-A76: 1165522: Speculative AT instruction using out-of-context translation regime coul…
654 This option adds a workaround for ARM Cortex-A76 erratum 1165522.
656 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
663 …bool "Cortex-A57/A72: 1319537: Speculative AT instruction using out-of-context translation regime …
667 This option adds work arounds for ARM Cortex-A57 erratum 1319537
670 Cortex-A57 and A72 cores could end-up with corrupted TLBs by
676 …bool "Cortex-A55: 1530923: Speculative AT instruction using out-of-context translation regime coul…
680 This option adds a workaround for ARM Cortex-A55 erratum 1530923.
682 Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
692 …bool "Cortex-A55: Completion of affected memory accesses might not be guaranteed by completion of …
696 This option adds a workaround for ARM Cortex-A55 erratum #2441007.
698 Under very rare circumstances, affected Cortex-A55 CPUs
709 …bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-a…
713 This option adds a workaround for ARM Cortex-A76 erratum 1286807.
715 On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
725 bool "Cortex-A76: Software Step might prevent interrupt recognition"
728 This option adds a workaround for Arm Cortex-A76 erratum 1463225.
730 On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
759 …bool "Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive o…
762 This option adds a workaround for Arm Cortex-A77 erratum 1508412.
764 Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
782 bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit"
785 This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
786 Affected Cortex-A510 might not respect the ordering rules for
793 bool "Cortex-A510: 2077057: workaround software-step corrupting SPSR_EL2"
796 This option adds the workaround for ARM Cortex-A510 erratum 2077057.
797 Affected Cortex-A510 may corrupt SPSR_EL2 when the a step exception is
810 bool "Cortex-A510: 2658417: remove BF16 support due to incorrect result"
813 This option adds the workaround for ARM Cortex-A510 erratum 2658417.
814 Affected Cortex-A510 (r0p0 to r1p1) may produce the wrong result for
823 bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode"
828 This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858.
830 Affected Cortex-A710/X2 cores could overwrite up to 3 cache lines of trace
862 bool "Cortex-A710: 2054223: workaround TSB instruction failing to flush trace"
866 Enable workaround for ARM Cortex-A710 erratum 2054223
913 bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range"
918 This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489.
920 Affected Cortex-A710/X2 cores might write to an out-of-range address, not reserved
931 …bool "Cortex-A510: Completion of affected memory accesses might not be guaranteed by completion of…
935 This option adds a workaround for ARM Cortex-A510 erratum #2441009.
937 Under very rare circumstances, affected Cortex-A510 CPUs
948 bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled"
952 This option adds the workaround for ARM Cortex-A510 erratum 2064142.
954 Affected Cortex-A510 core might fail to write into system registers after the
966 bool "Cortex-A510: 2038923: workaround TRBE corruption with enable"
970 This option adds the workaround for ARM Cortex-A510 erratum 2038923.
972 Affected Cortex-A510 core might cause an inconsistent view on whether trace is
989 bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
993 This option adds the workaround for ARM Cortex-A510 erratum 1902691.
995 Affected Cortex-A510 core might cause trace data corruption, when being written
1007 bool "Cortex-A510: 2457168: workaround for AMEVCNTR01 incrementing incorrectly"
1011 This option adds the workaround for ARM Cortex-A510 erratum 2457168.
1014 as the system counter. On affected Cortex-A510 cores AMEVCNTR01 increments
1024 bool "Cortex-A715: 2645198: Workaround possible [ESR|FAR]_ELx corruption"
1027 This option adds the workaround for ARM Cortex-A715 erratum 2645198.
1029 If a Cortex-A715 cpu sees a page mapping permissions change from executable
1043 bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
1047 This option adds the workaround for ARM Cortex-A520 erratum 2966298.
1049 On an affected Cortex-A520 core, a speculatively executed unprivileged
1057 bool "Cortex-A510: 3117295: workaround for speculatively executed unprivileged load"
1061 This option adds the workaround for ARM Cortex-A510 erratum 3117295.
1063 On an affected Cortex-A510 core, a speculatively executed unprivileged
1071 bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"
1076 * ARM Cortex-A76 erratum 3324349
1077 * ARM Cortex-A77 erratum 3324348
1078 * ARM Cortex-A78 erratum 3324344
1079 * ARM Cortex-A78C erratum 3324346
1080 * ARM Cortex-A78C erratum 3324347
1081 * ARM Cortex-A710 erratam 3324338
1082 * ARM Cortex-A715 errartum 3456084
1083 * ARM Cortex-A720 erratum 3456091
1084 * ARM Cortex-A725 erratum 3456106
1085 * ARM Cortex-X1 erratum 3324344
1086 * ARM Cortex-X1C erratum 3324346
1087 * ARM Cortex-X2 erratum 3324338
1088 * ARM Cortex-X3 erratum 3324335
1089 * ARM Cortex-X4 erratum 3194386
1090 * ARM Cortex-X925 erratum 3324334