arm/mm/proc-v7m.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/proc-v7m.S
8  *  This is the "shell" of the ARMv7-M processor support.
14 #include "proc-macros.S"
31  *	- loc   - location to jump to for soft reset
104  *	This should be able to cover all ARMv7-M cores.
116 	ldr	r5, [r0, #V7M_SCB_SHCSR]
117 	orr	r5, #(V7M_SCB_SHCSR_USGFAULTENA | V7M_SCB_SHCSR_BUSFAULTENA | V7M_SCB_SHCSR_MEMFAULTENA)
118 	str	r5, [r0, #V7M_SCB_SHCSR]
121 	mov	r5, #0x80000000
122 	str	r5, [r0, V7M_SCB_SHPR2]	@ set SVC priority
123 	mov	r5, #0x00800000
124 	str	r5, [r0, V7M_SCB_SHPR3]	@ set PendSV priority
130 	ldr	r5, [r12, #11 * 4]	@ read the SVC vector entry
140 	ldmia	sp, {r0-r3, r12}
141 	str	r5, [r12, #11 * 4]	@ restore the original SVC vector entry
144 	@ Special-purpose control register
150 	stmiane	sp, {r0-r6, lr}		@ v7m_invalidate_l1 touches r0-r6
152 	teq     r8, #0			@ re-evalutae condition
153 	ldmiane	sp, {r0-r6, lr}
155 	@ Configure the System Control Register to ensure 8-byte stack alignment
165  * Cortex-M7 processor functions
178 	string cpu_v7m_name "ARMv7-M"
197 	 * Match ARM Cortex-M55 processor.
201 	.long	0x410fd220		/* ARM Cortex-M55 0xD22 */
204 	.size	__v7m_cm55_proc_info, . - __v7m_cm55_proc_info
207 	 * Match ARM Cortex-M33 processor.
211 	.long	0x410fd210		/* ARM Cortex-M33 0xD21 */
214 	.size	__v7m_cm33_proc_info, . - __v7m_cm33_proc_info
217 	 * Match ARM Cortex-M7 processor.
221 	.long	0x410fc270		/* ARM Cortex-M7 0xC27 */
224 	.size	__v7m_cm7_proc_info, . - __v7m_cm7_proc_info
227 	 * Match ARM Cortex-M4 processor.
231 	.long	0x410fc240		/* ARM Cortex-M4 0xC24 */
234 	.size	__v7m_cm4_proc_info, . - __v7m_cm4_proc_info
237 	 * Match ARM Cortex-M3 processor.
241 	.long	0x410fc230		/* ARM Cortex-M3 0xC23 */
244 	.size	__v7m_cm3_proc_info, . - __v7m_cm3_proc_info
247 	 * Match any ARMv7-M processor core.
254 	.size	__v7m_proc_info, . - __v7m_proc_info