arm/mm/proc-arm920.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  *  linux/arch/arm/mm/proc-arm920.S: MMU functions for ARM920
7  *  hacked for non-paged-MM by Hyok S. Choi, 2003.
12  *  CONFIG_CPU_ARM920_CPU_IDLE -> nohlt
19 #include <asm/pgtable-hwdef.h>
22 #include "proc-macros.S"
51 ENTRY(cpu_arm920_proc_init)
57 ENTRY(cpu_arm920_proc_fin)
75 ENTRY(cpu_arm920_reset)
94 ENTRY(cpu_arm920_do_idle)
106 ENTRY(arm920_flush_icache_all)
115  *	Invalidate all cache entries in a particular address
118 ENTRY(arm920_flush_user_cache_all)
126 ENTRY(arm920_flush_kern_cache_all)
130 	mov	r1, #(CACHE_DSEGMENTS - 1) << 5	@ 8 segments
131 1:	orr	r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
146  *	address space.
148  *	- start	- start address (inclusive)
149  *	- end	- end address (exclusive)
150  *	- flags	- vm_flags for address space
152 ENTRY(arm920_flush_user_cache_range)
158 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
160 	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
172  *	region described by start, end.  If you have non-snooping
175  *	- start	- virtual start address
176  *	- end	- virtual end address
178 ENTRY(arm920_coherent_kern_range)
185  *	region described by start, end.  If you have non-snooping
188  *	- start	- virtual start address
189  *	- end	- virtual end address
191 ENTRY(arm920_coherent_user_range)
192 	bic	r0, r0, #CACHE_DLINESIZE - 1
193 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
194 	mcr	p15, 0, r0, c7, c5, 1		@ invalidate I entry
208  *	- addr	- kernel address
209  *	- size	- region size
211 ENTRY(arm920_flush_kern_dcache_area)
213 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
225  *	Invalidate (discard) the specified virtual address range.
230  *	- start	- virtual start address
231  *	- end	- virtual end address
236 	tst	r0, #CACHE_DLINESIZE - 1
237 	bic	r0, r0, #CACHE_DLINESIZE - 1
238 	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
239 	tst	r1, #CACHE_DLINESIZE - 1
240 	mcrne	p15, 0, r1, c7, c10, 1		@ clean D entry
241 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
251  *	Clean the specified virtual address range.
253  *	- start	- virtual start address
254  *	- end	- virtual end address
259 	bic	r0, r0, #CACHE_DLINESIZE - 1
260 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
270  *	Clean and invalidate the specified virtual address range.
272  *	- start	- virtual start address
273  *	- end	- virtual end address
275 ENTRY(arm920_dma_flush_range)
276 	bic	r0, r0, #CACHE_DLINESIZE - 1
277 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
286  *	- start	- kernel virtual start address
287  *	- size	- size of region
288  *	- dir	- DMA direction
290 ENTRY(arm920_dma_map_area)
300  *	- start	- kernel virtual start address
301  *	- size	- size of region
302  *	- dir	- DMA direction
304 ENTRY(arm920_dma_unmap_area)
311 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
316 ENTRY(cpu_arm920_dcache_clean_area)
317 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
333 ENTRY(cpu_arm920_switch_mm)
340 @ && Re-written to use Index Ops.
343 	mov	r1, #(CACHE_DSEGMENTS - 1) << 5	@ 8 segments
344 1:	orr	r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
364 ENTRY(cpu_arm920_set_pte_ext)
368 	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
373 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
377 ENTRY(cpu_arm920_do_suspend)
378 	stmfd	sp!, {r4 - r6, lr}
382 	stmia	r0, {r4 - r6}
383 	ldmfd	sp!, {r4 - r6, pc}
386 ENTRY(cpu_arm920_do_resume)
390 	ldmia	r0, {r4 - r6}
393 	mcr	p15, 0, r1, c2, c0, 0	@ TTB address
413 	.size	__arm920_setup, . - __arm920_setup
426 	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
466 	.size	__arm920_proc_info, . - __arm920_proc_info