arm/mm/proc-arm1020e.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  *  linux/arch/arm/mm/proc-arm1020e.S: MMU functions for ARM1020
7  *  hacked for non-paged-MM by Hyok S. Choi, 2003.
16 #include <asm/asm-offsets.h>
18 #include <asm/pgtable-hwdef.h>
21 #include "proc-macros.S"
25  * using the single invalidate entry instructions.  Anything larger
59 ENTRY(cpu_arm1020e_proc_init)
65 ENTRY(cpu_arm1020e_proc_fin)
83 ENTRY(cpu_arm1020e_reset)
102 ENTRY(cpu_arm1020e_do_idle)
115 ENTRY(arm1020e_flush_icache_all)
126  *	Invalidate all cache entries in a particular address
129 ENTRY(arm1020e_flush_user_cache_all)
136 ENTRY(arm1020e_flush_kern_cache_all)
142 	mov	r1, #(CACHE_DSEGMENTS - 1) << 5	@ 16 segments
143 1:	orr	r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
161  *	address space.
163  *	- start	- start address (inclusive)
164  *	- end	- end address (exclusive)
165  *	- flags	- vm_flags for this space
167 ENTRY(arm1020e_flush_user_cache_range)
174 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
190  *	region described by start.  If you have non-snooping
193  *	- start	- virtual start address
194  *	- end	- virtual end address
196 ENTRY(arm1020e_coherent_kern_range)
202  *	region described by start.  If you have non-snooping
205  *	- start	- virtual start address
206  *	- end	- virtual end address
208 ENTRY(arm1020e_coherent_user_range)
210 	bic	r0, r0, #CACHE_DLINESIZE - 1
213 	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
216 	mcr	p15, 0, r0, c7, c5, 1		@ invalidate I entry
231  *	- addr	- kernel address
232  *	- size	- region size
234 ENTRY(arm1020e_flush_kern_dcache_area)
238 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
249  *	Invalidate (discard) the specified virtual address range.
254  *	- start	- virtual start address
255  *	- end	- virtual end address
262 	tst	r0, #CACHE_DLINESIZE - 1
263 	bic	r0, r0, #CACHE_DLINESIZE - 1
264 	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
265 	tst	r1, #CACHE_DLINESIZE - 1
266 	mcrne	p15, 0, r1, c7, c10, 1		@ clean D entry
267 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
278  *	Clean the specified virtual address range.
280  *	- start	- virtual start address
281  *	- end	- virtual end address
288 	bic	r0, r0, #CACHE_DLINESIZE - 1
289 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
300  *	Clean and invalidate the specified virtual address range.
302  *	- start	- virtual start address
303  *	- end	- virtual end address
305 ENTRY(arm1020e_dma_flush_range)
308 	bic	r0, r0, #CACHE_DLINESIZE - 1
309 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
319  *	- start	- kernel virtual start address
320  *	- size	- size of region
321  *	- dir	- DMA direction
323 ENTRY(arm1020e_dma_map_area)
333  *	- start	- kernel virtual start address
334  *	- size	- size of region
335  *	- dir	- DMA direction
337 ENTRY(arm1020e_dma_unmap_area)
344 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
348 ENTRY(cpu_arm1020e_dcache_clean_area)
351 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
368 ENTRY(cpu_arm1020e_switch_mm)
374 2:	mov	ip, r3, LSL #26 		@ shift up entry
376 	mcr	p15, 0, ip, c7, c14, 2		@ Clean & Inval DCache entry
402 ENTRY(cpu_arm1020e_set_pte_ext)
407 	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
429 	.size	__arm1020e_setup, . - __arm1020e_setup
441 	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
475 	.size	__arm1020e_proc_info, . - __arm1020e_proc_info