arm/mm/cache-v7m.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/cache-v7m.S
5  *  Based on linux/arch/arm/mm/cache-v7.S
19 #include "proc-macros.S"
21 .arch armv7-m
50  * dcisw: Invalidate data cache by set/way
57  * dccisw: Clean and invalidate data cache by set/way
131 	and	r3, r1, r0, lsr #3      @ NumWays - 1
139 1:	sub	r2, r2, #1      @ NumSets--
141 2:	subs	r3, r3, #1      @ Temp--
146 	bgt	2b
157  *	Flush the whole I-cache.
160  *	r0 - set to 0
170  *	Flush the whole D-cache.
172  *	Corrupted registers: r0-r7, r9-r11
178 	ands	r3, r3, #7 << 1			@ extract LoC*2 from clidr
186 	cmp	r1, #2				@ see what cache we have at this level
187 	blt	skip				@ skip if no cache, or just i-cache
200 	ands	r4, r4, r1, lsr #3		@ find maximum number on the way size
201 	clz	r5, r4				@ find bit position of way size increment
208 	orr	r11, r10, r6			@ factor way and cache number into r11
211 	dccisw	r11, r6				@ clean/invalidate by set/way
214 	subs	r4, r4, #1			@ decrement the way
217 	add	r10, r10, #2			@ increment cache number
233  *  working outwards from L1 cache. This is done using Set/Way based cache
240 	stmfd	sp!, {r4-r7, r9-r11, lr}
243 	ldmfd	sp!, {r4-r7, r9-r11, lr}
252  *	- mm    - mm_struct describing address space
262  *	- start - start address (may not be aligned)
263  *	- end   - end address (exclusive, may not be aligned)
264  *	- flags	- vm_area_struct flags describing address space
267  *	- we have a VIPT cache.
281  *	- start   - virtual start address of region
282  *	- end     - virtual end address of region
285  *	- the Icache does not read data from the write buffer
297  *	- start   - virtual start address of region
298  *	- end     - virtual end address of region
301  *	- the Icache does not read data from the write buffer
321 2:
325 	blo	2b
340  *	- addr	- kernel address
341  *	- size	- region size
364  *	- start   - virtual start address of region
365  *	- end     - virtual end address of region
390  *	- start   - virtual start address of region
391  *	- end     - virtual end address of region
408  *	- start   - virtual start address of region
409  *	- end     - virtual end address of region
426  *	- start	- kernel virtual start address
427  *	- size	- size of region
428  *	- dir	- DMA direction
439  *	- start	- kernel virtual start address
440  *	- size	- size of region
441  *	- dir	- DMA direction
455 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)